Texas Instruments PGA206UA
- Part No.:
- PGA206UA
- Manufacturer:
- Texas Instruments
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
PGA206UA.pdf
- Description:
- IC INST AMP 1 CIRCUIT 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:372
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Product details
Overview
PGA206UA from Texas Instruments (formerly Burr-Brown) is a high-speed, digitally programmable gain instrumentation amplifier with FET inputs, ±40V input protection, and selectable gains of 1, 2, 4, or 8 V/V - designed for precision multiplexed data acquisition in medical and industrial sensor interfaces.
For engineers reviewing the PGA206UA datasheet, PGA206UA pinout, PGA206UA application, or PGA206UA equivalent, key selection considerations include its 3.5 µs settling time to 0.01%, 100 pA max input bias current, ±1.5 mV max offset voltage, 16-pin SOL-16 surface-mount package, and CMOS/TTL-compatible digital address lines A0/A1 for gain control.
Technical Context
The PGA206UA implements a three-op-amp instrumentation architecture with digitally switched feedback networks, enabling true differential input operation and rail-to-rail output sensing via dedicated VO1/VO2 pins. Its over-voltage protection operates even with power supplies off.
Gain selection is performed by two unbuffered CMOS/TTL-compatible address inputs (A0, A1), with switching time of 500 ns and immediate gain change propagation - no internal latching. Digital ground (pin 14) carries ~1.2 mA and must be routed separately from analog ground to prevent coupling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gains | 1, 2, 4, 8 V/V - digitally selected via A0/A1; enables single-amplifier support for multi-range sensor scaling without external relays or op-amp switching. |
| Settling Time | 3.5 µs to 0.01% - supports high-throughput multiplexed DAQ systems with ≥285 kSPS effective channel rate at full accuracy. |
| Input Bias Current | 100 pA max - preserves signal integrity with high-impedance sources (e.g., thermocouples, piezoelectric sensors) without added error from series resistance. |
| Input Protection | ±40V continuous - protects against transients and miswiring in field-deployed instrumentation, even with supplies disconnected. |
| Offset Voltage | ±1.5 mV max - laser-trimmed for low drift; reduces need for per-channel software zeroing in multi-sensor systems. |
| Bandwidth | 600 kHz at G=8 - maintains usable small-signal bandwidth across full gain range for dynamic physiological or vibration signals. |
| Supply Range | ±4.5 V to ±18 V - supports dual-supply industrial rails (±12 V, ±15 V) and accommodates headroom for output swing and reference stability. |
Pinout & Package
SOL-16 surface-mount package (package drawing DW, TI designation); 10.3 mm × 7.5 mm footprint, 2.35 mm max height, MSL Level-3, 260°C peak reflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | VO1 / VO2 | Outputs of input-stage amplifiers A1 and A2 - used for overload detection and shield drive; not intended as primary outputs. |
| 2, 3 | VIN– / VIN+ | Differential instrumentation inputs - high-impedance FET nodes with ±40V protection; require matched PCB routing for CMR preservation. |
| 4, 5 | V– / V+ | Negative / positive supply pins - decoupling capacitors (1 µF) required adjacent to each pin for stability and noise rejection. |
| 6 | VOS Adj | Input offset trim node - connects to external potentiometer or DAC for gain-dependent offset correction in high-accuracy applications. |
| 7 | A1 | MSB gain address input - TTL/CMOS compatible; logic high > VDG + 2 V; referenced to digital ground (pin 14). |
| 8 | A0 | LSB gain address input - same logic thresholds as A1; combination defines gain per truth table (00=1×, 01=2×, 10=4×, 11=8×). |
| 9 | Digital Ground | Reference for A0/A1 logic - carries ~1.2 mA; must be isolated from analog ground to avoid injecting digital current into sensitive analog paths. |
| 10 | Ref | Output reference terminal - defines output common-mode level; requires low-impedance connection (≤2 Ω) to maintain >80 dB CMR at G=1. |
| 11 | VO | Main differential output - buffered, low-impedance; drives ADC inputs or downstream stages directly; specified for ±11 V swing at ±15 V supplies. |
| 12 | Sense | Output sense feedback - must be shorted to VO (pin 11) for accurate load regulation; connect at load for best accuracy under cable capacitance. |
| 14 | NC | No internal connection - left unconnected; not used for thermal relief or grounding. |
| 15, 16 | NC | No internal connection - electrically and functionally unused; may be omitted from PCB layout. |
Key Features
| Feature | Design Value |
|---|---|
| FET-input instrumentation topology | Enables ≤100 pA input bias current, critical for high-Z sensor interfacing without loading-induced gain/offset errors. |
| Digitally programmable gain (1/2/4/8×) | Eliminates external gain-switching components and layout complexity in multi-range DAQ systems; controlled via two logic lines. |
| ±40V input overvoltage protection | Allows direct connection to industrial field wiring without external clamping; survives fault conditions with supplies off. |
| 3.5 µs settling to 0.01% | Supports fast channel scanning in multiplexed systems while maintaining 16-bit+ accuracy across all gains. |
| Laser-trimmed offset and drift | Guarantees ≤±1.5 mV initial offset and ≤6 µV/°C drift, reducing calibration overhead in medical and test equipment. |
Applications
| Medical Physiological Monitoring | Multiplexed Industrial Sensor Acquisition |
|---|---|
Use Scenario: Amplifying low-level ECG, EEG, or EMG signals from dry electrodes or high-impedance biopotential sensors in portable patient monitors. IC Role / Device Role / Timing Role: Primary signal-conditioning stage providing programmable gain, high CMRR, and input protection before ADC sampling. Use Value: 100 pA input bias prevents electrode polarization errors; ±40V protection tolerates defibrillation pulses and ESD events during clinical use. | Use Scenario: Scanning 8–16 channels of RTD, strain gauge, or thermocouple outputs in PLC analog input modules. IC Role / Device Role / Timing Role: Channel-specific programmable gain amplifier in front of a shared SAR ADC, synchronized with multiplexer timing. Use Value: 3.5 µs settling enables ≥285 kSPS aggregate throughput; digital gain control simplifies firmware-driven range selection per channel. |
| PC-Based Data Acquisition Boards | High-Accuracy Bridge Signal Conditioning |
Use Scenario: Front-end gain stage on USB or PCIe DAQ cards supporting software-configurable input ranges (±10 mV to ±10 V full-scale). IC Role / Device Role / Timing Role: Precision instrumentation amplifier with digital gain interface, directly controlled by host microcontroller GPIOs. Use Value: A0/A1 logic compatibility with 3.3 V/5 V MCUs eliminates level-shifting; 16-pin SOIC eases layout in space-constrained board designs. | Use Scenario: Amplifying mV-level outputs from Wheatstone bridges in load cells or pressure transducers with 0.01% linearity requirements. IC Role / Device Role / Timing Role: Low-drift, low-noise gain block with offset adjustment capability for factory calibration and temperature compensation. Use Value: Laser-trimmed offset (±1.5 mV max) and <6 µV/°C drift minimize thermal zero-shift; VOS Adj pin supports fine-tuning post-calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable gain instrumentation amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| INA2332AIDW | Fixed G=1000 only; no digital gain selection; lower bandwidth (1.5 MHz), higher noise (25 nV/√Hz at 1 kHz). | Best for fixed-gain, high-CMRR bridge amps where gain doesn't vary per channel. | Select INA2332AIDW only when gain is static and speed/noise budget permits - not a functional substitute for PGA206UA's programmability. |
| AD8253ARMZ | G=1/10/100/1000; SPI interface (not parallel A0/A1); higher quiescent current (1.8 mA vs 12.4/–11.2 mA); smaller 10-lead MSOP package. | Suited for microcontroller-based systems with SPI availability and tighter board area constraints. | Choose AD8253ARMZ when SPI control and ultra-low gain-step resolution (1000×) outweigh need for TTL-compatible parallel addressing and SOIC layout familiarity. |
Compared with INA2332AIDW and AD8253ARMZ, the PGA206UA uniquely delivers parallel digital gain control in a standard 16-pin SOIC with guaranteed 3.5 µs settling and ±40V protection - making it optimal for legacy-compatible, high-reliability multiplexed DAQ designs where pinout stability and ruggedness are prioritized.
Availability
PGA206UA is available at Aetrix Electronics and suitable for medical monitoring devices, industrial PLC analog input modules, and PC-based data acquisition boards requiring stable component supply and long-term design continuity.
Supply support for PGA206UA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments acquired Burr-Brown in 2000 and maintains its precision analog portfolio, emphasizing high-performance signal conditioning, data conversion, and power management ICs for industrial, medical, and test equipment.
The PGA206UA belongs to TI's legacy programmable gain instrumentation amplifier family, engineered specifically for multiplexed, high-accuracy sensor signal chains where digital gain agility, input ruggedness, and fast settling are mandatory.
FAQ
What gain settings does the PGA206UA support, and how are they selected?
The PGA206UA supports four discrete gains: 1, 2, 4, and 8 V/V. These are selected using two CMOS/TTL-compatible digital address inputs, A0 (pin 8) and A1 (pin 7). The gain is determined by the binary combination: A1A0 = 00 selects G=1, 01 selects G=2, 10 selects G=4, and 11 selects G=8. The PGA206UA responds immediately to address changes with a 500 ns logic switching time.
Does the PGA206UA require external components for basic operation?
Yes - the PGA206UA requires external 1 µF decoupling capacitors on both V+ (pin 5) and V– (pin 4) pins, placed as close as possible to the device. The Ref (pin 10) terminal must be connected to a low-impedance ground (≤2 Ω) to preserve CMRR. Sense (pin 12) must be shorted to VO (pin 11) unless remote sensing is implemented. No external gain-setting resistors are needed - all feedback is internal and digitally switched.
Can the PGA206UA operate with a single supply?
No - the PGA206UA is specified only for dual-supply operation from ±4.5 V to ±18 V. Its input common-mode range extends to within ~2.3 V of each rail, and output swing is asymmetric (e.g., +11 V / –11 V at ±15 V supplies). Single-supply operation is not supported, and attempting it will result in undefined behavior, saturation, or damage.
What is the purpose of the VO1 and VO2 pins on the PGA206UA?
Pins 1 and 13 (VO1 and VO2) are the buffered outputs of the two input-stage amplifiers (A1 and A2). They are not intended as main signal outputs but serve two critical functions: (1) overload detection - monitoring VO1/VO2 reveals when either input amplifier saturates, indicating input overvoltage even if VO appears normal; (2) shield drive - driving cable shields with VO1/VO2 improves noise rejection in high-impedance sensor connections. The PGA206UA datasheet provides example circuits for both uses.
Is the PGA206UA still in active production, and what is its lifecycle status?
The PGA206UA is marked "Last Time Buy" by Texas Instruments, indicating it is in end-of-life (EOL) transition. TI continues to fulfill orders through authorized distributors, and Aetrix Electronics maintains strategic inventory with full traceability. For new designs, TI recommends evaluating the AD8253 or INA828 as alternatives - however, the PGA206UA remains fully supported for legacy system repair, replacement, and long-lifecycle industrial deployments where form-fit-function compatibility is essential.
PGA206UA Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Bulk
- Product Status:
- Active
- Amplifier Type:
- Instrumentation
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 25V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 5 MHz
- Current - Input Bias:
- 2 pA
- Voltage - Input Offset:
- 1 mV
- Current - Supply:
- 12.4mA
- Current - Output / Channel:
- 17 mA
- Voltage - Supply Span (Min):
- 9 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
PGA206UA FAQ
1.How can I place an order for PGA206UA through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA206UA on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA206UA reliable?
The price and inventory of PGA206UA are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA206UA is usually 5 days.
3.What payment methods are accepted for PGA206UA?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA206UA transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA206UA?
PGA206UA orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA206UA order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA206UA?
For technical support, including PGA206UA datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA206UA requirements.
6.How does Aetrix verify that PGA206UA is sourced from the original manufacturer or authorized distributors?
All PGA206UA products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA206UA meets industry standards.
7.What is the process for return or replacement of PGA206UA?
All PGA206UA units undergo pre-shipment inspection (PSI). If there is an issue with PGA206UA, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA206UA part is unused and in its original packaging.
Return procedure for PGA206UA:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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