Texas Instruments PGA2311P
- Part No.:
- PGA2311P
- Manufacturer:
- Texas Instruments
- Category:
- Audio Special Purpose
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
PGA2311P.pdf
- Description:
- IC VOLUME CONTROL 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:3,208
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PGA2311P from Texas Instruments is a stereo analog audio volume controller IC with independent left/right channel gain control, serial 3-wire interface (CS/SDI/SCLK), zero-crossing detection for glitch-free level transitions, and ±5-V analog / +5-V digital supply operation. It delivers 120-dB dynamic range, −130 dBFS interchannel crosstalk, and supports 0.5-dB step resolution across +31.5 dB to −95.5 dB range - used in professional mixing consoles and high-end A/V receivers.
For engineers reviewing the PGA2311P datasheet, PGA2311P pinout, PGA2311P application, or PGA2311P equivalent, key selection considerations include its dual-channel analog gain architecture, PDIP-16 package compatibility, A-grade vs U-grade THD+N performance (0.0002% vs 0.0004%), and daisy-chainable serial interface for multi-device volume control systems.
Technical Context
The PGA2311P implements digitally controlled analog attenuation using a precision resistor ladder and analog switch array per channel, followed by a low-noise op-amp output stage capable of driving 660-Ω loads directly. Gain is set via 8-bit straight-binary codes (R[7:0]/L[7:0]) with mute (N=0) and full-scale (+31.5 dB at N=255) states.
Its serial interface operates up to 6.25 MHz with MSB-first timing, supports hardware muting (MUTE pin), zero-crossing–enabled gain updates (ZCEN), and daisy-chaining via SDO-to-SDI cascading - requiring CS low for 16×N clock cycles where N is the number of chained devices.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain Range | +31.5 dB to −95.5 dB in 0.5-dB steps - enables precise loudness matching and wide headroom control in multi-source audio systems |
| Dynamic Range | 120 dB - supports high-fidelity signal paths with >16-bit effective resolution in professional audio applications |
| THD+N (A-grade) | 0.0002% at 1 kHz - meets broadcast-grade distortion requirements without post-processing compensation |
| Interchannel Crosstalk | −130 dBFS - prevents audible leakage between left/right channels in stereo imaging-critical equipment |
| Analog Supply | ±4.75 V to ±5.25 V - requires split-rail analog power with tight regulation to maintain specified noise and linearity |
| Digital Supply | +4.75 V to +5.25 V - compatible with standard 5-V microcontroller I/O without level shifting |
| Output Drive | Direct 660-Ω load capability - eliminates need for external buffer stages in line-level output designs |
Pinout & Package
PGA2311P is supplied in a 16-pin plastic dual in-line package (PDIP-N), 6.35 mm × 19.30 mm body size, with through-hole mounting and industry-standard lead pitch. Pin 1 is marked with a notch or dot; pins are numbered counter-clockwise from top-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ZCEN (1) | Zero-crossing enable input | Active-high control that gates gain updates to occur only at input signal zero crossings - prevents audible clicks during volume changes |
| CS (2) | Chip-select input | Active-low enable for serial data loading; must remain low for full 16-bit transfer (or 16×N bits in daisy-chain mode) |
| SDI (3) | Serial data input | MSB-first 16-bit command stream: bits R7–R0 (right channel), then L7–L0 (left channel); latched on SCLK rising edge |
| VD+ (4) | Digital power supply | +5-V rail powering logic circuitry and serial interface - decoupling required within 1 cm of pin |
| DGND (5) | Digital ground | Reference for all digital inputs/outputs; must be isolated from analog ground except at single-point star connection |
| SCLK (6) | Serial clock input | Up to 6.25 MHz clock; rising edge clocks SDI data, falling edge outputs SDO data in daisy-chain configurations |
| SDO (7) | Serial data output | Tri-state output active only when CS is low; used to cascade data to next PGA2311 in daisy-chain topology |
| MUTE (8) | Hardware mute control | Active-low signal that disconnects output buffers and terminates VOUTL/VOUTR with 10-kΩ resistors to AGND - eliminates pop/click on power-up or fault |
| VINR (9) | Right channel analog input | Unbalanced input referenced to AGNDR; accepts up to ±3.75 V (1.25 V from rails) with <600 Ω source impedance for optimal THD+N |
| AGNDR (10) | Right channel analog ground | Dedicated analog reference for right channel; must be routed separately from DGND and joined only at system star point |
| VOUTR (11) | Right channel analog output | Buffered output capable of driving 660 Ω directly; swing limited to (VA+)−1.25 V and (VA−)+1.25 V |
| VA+ (12) | Positive analog supply | +5-V rail powering internal op-amps and analog switches - requires low-ESR ceramic bypass capacitor near pin |
| VA− (13) | Negative analog supply | −5-V rail; voltage range specification confirms (VA−)+1.25 V lower bound for output swing in PGA2311P (U-grade) |
| VOUTL (14) | Left channel analog output | Identical to VOUTR; maintains channel independence and matched gain accuracy (±0.05 dB matching) |
| AGNDL (15) | Left channel analog ground | Dedicated reference for left channel; symmetric layout with AGNDR ensures balanced crosstalk performance |
| VINL (16) | Left channel analog input | Unbalanced input referenced to AGNDL; functionally identical to VINR with same voltage and impedance constraints |
Key Features
| Feature | Design Value |
|---|---|
| Noise-free gain transitions | Zero-crossing detection (ZCEN-enabled) synchronizes level changes to input signal zero crossings - eliminates audible artifacts in live audio mixing |
| Dual independent channels | Separate 8-bit gain registers (R[7:0], L[7:0]) with ±0.05 dB matching - preserves stereo image integrity during asymmetric volume adjustments |
| Daisy-chain serial interface | SDO-to-SDI cascading supports N-device chains with single 3-wire bus - reduces MCU GPIO count and PCB routing complexity in multi-zone audio systems |
| Hardware mute with offset calibration | MUTE pin triggers internal amplifier disconnect, 10-kΩ ground termination, and offset calibration - ensures silent startup and fast fault recovery |
| Direct 660-Ω load drive | Output stage designed for line-level sources without external buffering - simplifies BOM and improves THD+N by avoiding additional active stages |
Applications
| Professional Mixing Console | Broadcast Studio Equipment |
|---|---|
Use Scenario: Real-time fader control in analog summing mixers with digital automation. IC Role / Device Role / Timing Role: Stereo analog volume controller providing independent left/right channel attenuation with zero-crossing–synchronized updates. Use Value: Enables click-free remote fader moves and recallable channel gains while maintaining −130 dBFS crosstalk for accurate stereo panning. | Use Scenario: Master output level control in OB van audio routers with redundant signal paths. IC Role / Device Role / Timing Role: Final-stage analog gain block before AES/EBU conversion, configured via FPGA-controlled serial interface. Use Value: Delivers 120-dB dynamic range and <0.0004% THD+N to preserve broadcast audio fidelity without digital gain-induced quantization noise. |
| High-End A/V Receiver | Car Audio DSP Head Unit |
Use Scenario: Preamp-level volume control feeding discrete power amplifiers in home theater systems. IC Role / Device Role / Timing Role: Digitally programmable analog attenuator interfaced to ARM-based media processor via SPI. Use Value: Provides 0.5-dB resolution across 127-dB range and ±5-V rail compatibility with legacy analog amplifier stages. | Use Scenario: Channel-specific gain staging in automotive infotainment units with multi-zone audio processing. IC Role / Device Role / Timing Role: Dual-channel analog volume IC supporting daisy-chained configuration for 6+ speaker outputs. Use Value: Reduces component count versus discrete op-amp solutions while meeting automotive ESD (±2000 V HBM) and thermal (RθJA = 39.9°C/W) requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo analog volume control applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PGA2311U | SOIC-16 package; identical electrical specs but different thermal resistance (RθJA = 83°C/W) and moisture sensitivity level (MSL-2) | Suitable for surface-mount production; requires reflow-compatible layout and tighter thermal management | Select PGA2311U for automated assembly; PGA2311P remains preferred for prototyping, through-hole boards, or thermal-limited enclosures |
| CS3310-KS | Crystal Semiconductor part; pin- and software-compatible per TI documentation; same 0.5-dB step, ±5-V analog supply, and daisy-chain support | Legacy availability; discontinued by Cirrus Logic but supported in existing designs with identical register mapping | Use CS3310-KS only for drop-in replacement in legacy systems; PGA2311P offers extended product lifecycle and TI technical support |
Compared with PGA2311U and CS3310-KS, the PGA2311P provides superior thermal performance in through-hole layouts (RθJA = 39.9°C/W), guaranteed long-term availability from Texas Instruments, and documented A-grade THD+N validation - making it the recommended choice for new industrial and broadcast designs requiring reliability and serviceability.
Availability
PGA2311P is available at Aetrix Electronics and suitable for professional audio amplifiers, broadcast studio equipment, and high-end A/V receivers requiring stable component supply, long-lifecycle assurance, and traceable sourcing.
Supply support for PGA2311P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog and embedded processing technologies with over 90 years of innovation in precision signal chain components.
The PGA2311P belongs to TI's professional audio analog volume controller product line, engineered specifically for low-noise, high-dynamic-range stereo signal path control in broadcast, studio, and premium consumer audio systems.
FAQ
What is the maximum analog input voltage the PGA2311P can accept without clipping?
The PGA2311P accepts analog input signals up to (VA−)+1.25 V and (VA+)-1.25 V. With ±5-V supplies, this yields a maximum input swing of ±3.75 V (7.5 Vpp). Exceeding this range causes hard clipping at the internal resistor network, degrading THD+N and dynamic range. The PGA2311P datasheet specifies 2.5 Vrms as the maximum unclipped input level under typical conditions.
Does the PGA2311P support daisy-chaining, and how many devices can be cascaded?
Yes, the PGA2311P supports daisy-chaining via its SDO-to-SDI connection. Each device adds 16 bits to the serial shift register, so N devices require a 16×N-bit command word and CS low for 16×N SCLK cycles. There is no hard limit on N, but timing margins, signal integrity, and SCLK frequency (≤6.25 MHz) constrain practical implementations to ≤8 devices on a single bus without repeaters.
What is the difference between PGA2311P and PGA2311PA?
The PGA2311P is the U-grade version with 0.0004% THD+N at 1 kHz, while PGA2311PA is the A-grade variant achieving 0.0002% THD+N - verified in production testing. Both share identical pinout, package (PDIP-16), gain range, and interface protocol. The A-grade part targets broadcast and mastering applications where ultra-low distortion is mandatory.
How does the zero-crossing detection function work in the PGA2311P?
The PGA2311P monitors the analog input signal for zero crossings on each channel. When ZCEN is high and a new gain code is loaded, the update is held until either a positive-slope zero crossing occurs or a 16-ms timeout expires. This prevents transient glitches during volume changes. The PGA2311P implements this entirely in analog circuitry - no external zero-crossing detector is needed.
Can the PGA2311P operate with asymmetric analog supply voltages, such as +5 V and −3.3 V?
No. The PGA2311P requires symmetrical ±5-V analog supplies (±4.75 V to ±5.25 V) as specified in the Recommended Operating Conditions table. Asymmetric rails violate the internal biasing of the op-amp and resistor network, causing gain error, increased THD+N, and potential output saturation. The PGA2311P voltage range specification explicitly references (VA−)+1.25 V and (VA+)-1.25 V - confirming strict symmetry dependency.
PGA2311P Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Function:
- Volume Control
- Applications:
- Audio, Musical Instruments
- Number of Channels:
- 2
- Interface:
- SPI
- Voltage - Supply:
- ±4.75V ~ 5.25V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Specifications:
- 31.5dB ~ -95.5dB
- Mounting Type:
- Through Hole
- Grade:
- Automotive
PGA2311P FAQ
1.How can I place an order for PGA2311P through Aetrix?
Please submit a Request for Quotation (RFQ) for PGA2311P on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PGA2311P reliable?
The price and inventory of PGA2311P are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PGA2311P is usually 5 days.
3.What payment methods are accepted for PGA2311P?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PGA2311P transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PGA2311P?
PGA2311P orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PGA2311P order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PGA2311P?
For technical support, including PGA2311P datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PGA2311P requirements.
6.How does Aetrix verify that PGA2311P is sourced from the original manufacturer or authorized distributors?
All PGA2311P products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PGA2311P meets industry standards.
7.What is the process for return or replacement of PGA2311P?
All PGA2311P units undergo pre-shipment inspection (PSI). If there is an issue with PGA2311P, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PGA2311P part is unused and in its original packaging.
Return procedure for PGA2311P:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PGA2311P Tags

-
SA571DR2G
onsemi

-
ADAU7002ACBZ-R7
Analog Devices Inc.

-
DRV135UA/2K5
Texas Instruments

-
DRV134UA/1K
Texas Instruments

-
DRV134PA
Texas Instruments

-
DRV134UA
Texas Instruments

-
DRV135UA
Texas Instruments

-
SA572DR2G
onsemi

-
PGA2311U/1K
Texas Instruments

-
SI8244BB-D-IS1R
Skyworks Solutions Inc.

-
CS8416K-CZZR
Cirrus Logic Inc.

-
SRC4392IPFBR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

