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Diodes Incorporated PI2EQX6812ZHEX
- Part No.:
- PI2EQX6812ZHEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Signal Buffers, Repeaters, Splitters
- Package:
- 42-VFQFN Exposed Pad
- Datasheet:
-
PI2EQX6812ZHEX.pdf
- Description:
- IC REDRIVER 6.5GBPS 4CHAN 42TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,309
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Product details
Overview
PI2EQX6812ZHEX from Pericom Semiconductor is a 6.5Gbps 2-lane (4-channel) SAS2/SATA/XAUI ReDriver™ with programmable equalization, transmitter de-emphasis, and input threshold control. It operates from a single 1.2V ±0.05V supply, delivers 95mA typical active current per channel, and supports OOB signaling, mux/demux, and loop-back for backplane and switch-fabric interconnects in storage systems.
For engineers reviewing the PI2EQX6812ZHEX datasheet, PI2EQX6812ZHEX pinout, PI2EQX6812ZHEX application, or PI2EQX6812ZHEX equivalent, key selection criteria include differential channel count (4), equalization/de-emphasis adjustability, I²C vs. pin-strap configuration, slumber mode current (10mA/ch), and TQFN-42 package compatibility with high-density server PCB layouts.
Technical Context
The PI2EQX6812ZHEX implements two independent 2-channel ReDriver lanes, each supporting CML-based 100Ω differential I/Os for SAS2, SATA III, and XAUI protocols. Its equalizer adapts to pre-ReDriver channel loss, while de-emphasis compensates for post-ReDriver inter-symbol interference.
Configuration is supported via 3.3V-tolerant I²C interface or hardware pin strapping. Power management includes dedicated PD# pin control, register-controlled standby, and automatic slumber mode triggered by idle input detection-reducing per-channel current from 95mA to 10mA without host intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Max Data Rate | 6.5Gbps per channel - supports full SAS2, SATA III, and XAUI line rates without protocol translation. |
| Channel Count | 4 differential channels (2 lanes) - enables dual-lane SAS2 links or quad-lane XAUI expansion across backplanes. |
| Supply Voltage | 1.2V ±0.05V - tight tolerance ensures stable equalization gain and low-jitter re-timing under varying load conditions. |
| Active Current | 95mA per channel (typical) - defines thermal budget for 4-channel operation in 9mm × 3.5mm TQFN package. |
| Slumber Current | 10mA per channel (typical) - reduces total system power by >89% during link idle periods in storage controllers. |
| I²C Interface | 3.3V-tolerant - allows direct connection to standard system management buses without level-shifting circuitry. |
| Termination | Integrated 50Ω input/output - eliminates need for external termination resistors on CML signal paths. |
Pinout & Package
Package: 42-contact TQFN (9mm × 3.5mm), Pb-free and RoHS-compliant, with exposed thermal pad for enhanced heat dissipation in high-density server modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0Rx+, A0Rx− | Lane A Channel 0 Differential Input | Accepts degraded CML signals from ASIC; feeds into channel-specific equalizer stage. |
| A0Tx+, A0Tx− | Lane A Channel 0 Differential Output | Drives compensated signal to switch fabric/backplane with adjustable de-emphasis. |
| B0Rx+, B0Rx− | Lane B Channel 0 Differential Input | Independent input path enabling dual-lane SAS2 or split XAUI routing. |
| B0Tx+, B0Tx− | Lane B Channel 0 Differential Output | Supports mux/demux and loop-back test modes without cross-lane interference. |
| PD# | Power Down Control Input | Active-low hardware control for immediate entry into standby mode (1mA total). |
| SDA, SCL | I²C Serial Interface | Enables dynamic real-time adjustment of equalization, de-emphasis, and threshold settings. |
| VDD, GND | Power and Ground | Dedicated pins per lane group minimize supply noise coupling between channels. |
Key Features
| Feature | Design Value |
|---|---|
| Programmable Equalization | Adjusts receiver gain to compensate for up to 20dB of pre-ReDriver channel loss at 3.25GHz. |
| Configurable De-emphasis | Provides up to 9dB of high-frequency boost on Tx outputs to counteract post-ReDriver attenuation. |
| Independent Lane Control | Each of two lanes has separate I²C address and pin-strapped settings-enabling asymmetric link tuning. |
| OOB Signal Support | Preserves SAS Out-of-Band primitives (e.g., COMINIT, COMWAKE) without distortion or delay skew. |
| Automatic Slumber Mode | Enters low-power state within 1µs of detecting idle input; exits synchronously on valid data edge. |
Applications
| Data Center Server Interconnect | Blade Server Backplane |
|---|---|
Use Scenario: Extending SAS2 links from host controller to midplane connectors over 20cm FR4 traces with >15dB loss at Nyquist frequency. IC Role / Device Role / Timing Role: Signal integrity restoration ReDriver placed between SoC and backplane connector to recover eye opening. Use Value: Enables reliable 6.5Gbps operation without redesigning PCB stackup or adding repeaters. | Use Scenario: Routing four XAUI lanes across modular blade-to-midplane interfaces with variable trace lengths and impedance discontinuities. IC Role / Device Role / Timing Role: Per-lane reconditioning element ensuring deterministic jitter accumulation < 0.3UI peak-to-peak. Use Value: Eliminates need for custom-length cables or active backplanes while maintaining IEEE 802.3ap compliance. |
| Enterprise Storage Controller | SAS Expander Module |
Use Scenario: Driving dual SAS2 ports from a RAID-on-Chip ASIC to external JBOD enclosures via copper cables. IC Role / Device Role / Timing Role: Bidirectional ReDriver supporting both transmit and receive paths with OOB pass-through. Use Value: Maintains COMINIT handshake integrity and link training success rate >99.9% across 5m cable runs. | Use Scenario: Embedding in 24-port SAS expanders where signal degradation occurs across internal fanout traces. IC Role / Device Role / Timing Role: Lane-level signal regeneration before multiplexing to downstream PHYs. Use Value: Reduces bit error rate from 1e−8 to <1e−12 at 6.5Gbps, extending expander reliability MTBF by 3×. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ReDriver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI DS125DF410 | 4-channel, 12.5Gbps max; requires 1.8V core + 3.3V I/O; no integrated 50Ω termination. | Targets higher-speed PCIe 4.0/USB 3.2 Gen2x2; lacks native SAS2 OOB support. | Select when upgrading to 12G SAS3 or multi-protocol flexibility is required; adds external termination and level-shifting. |
| Diodes AP1324 | 2-channel, 6Gbps; fixed equalization/de-emphasis; no I²C interface; 1.8V supply only. | Designed for cost-sensitive SATA-only applications; no slumber mode or OOB handling. | Select for SATA SSD trays where configurability and SAS compatibility are unnecessary. |
Compared with DS125DF410 and AP1324, PI2EQX6812ZHEX uniquely balances SAS2-native OOB support, 1.2V efficiency, and per-lane programmability in a compact TQFN-making it optimal for space-constrained, mixed-protocol storage interconnects requiring low static power.
Availability
PI2EQX6812ZHEX is available at Aetrix Electronics and suitable for data center servers, blade server backplanes, and enterprise storage controllers requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for PI2EQX6812ZHEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Pericom Semiconductor (now part of Diodes Incorporated) specialized in high-speed signal integrity solutions including ReDrivers, switches, and clock devices for datacenter and communications infrastructure.
The PI2EQX6812 belongs to Pericom's ReDriver™ family, engineered specifically for SAS2/SATA/XAUI physical layer extension in storage and server platforms where channel loss compensation and low-power link management are critical.
FAQ
What configuration methods does PI2EQX6812ZHEX support?
PI2EQX6812ZHEX supports dual configuration modes: hardware pin strapping for static setup at power-on, and an I²C interface (3.3V-tolerant SDA/SCL) for dynamic runtime adjustment of equalization, de-emphasis, and input threshold levels. Both methods operate independently per lane, enabling asymmetric tuning across the two 2-channel lanes without firmware dependency.
Does PI2EQX6812ZHEX support SAS2 Out-of-Band (OOB) signaling?
Yes, PI2EQX6812ZHEX fully preserves SAS2 OOB primitives-including COMINIT, COMWAKE, and hardware reset sequences-without distortion or timing skew. Its analog signal path maintains sub-10ps group delay variation across OOB frequency bands (150–500MHz), ensuring reliable link initialization and recovery in enterprise storage environments.
How does the slumber mode operate and what triggers it?
Slumber mode activates automatically when the device detects idle input (no valid data transitions for >1µs) on any enabled channel. It reduces per-channel current from 95mA to 10mA while retaining I²C accessibility and OOB detect capability. Exit occurs synchronously on the first valid data edge, with full signal integrity restored within 200ns-no software intervention required.
Is external termination required for PI2EQX6812ZHEX's differential I/Os?
No external termination is required. PI2EQX6812ZHEX integrates matched 50Ω terminations on all four differential inputs and outputs, compatible with standard 100Ω differential CML signaling. This eliminates discrete termination resistors, saves PCB area, and avoids impedance mismatches that cause reflections in high-speed SAS2/SATA/XAUI traces.
PI2EQX6812ZHEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- ReDriver™
- Package/Case:
- 42-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Buffer, ReDriver
- Applications:
- SAS, SATA
- Input:
- CML
- Output:
- CML
- Data Rate (Max):
- 6.5Gbps
- Number of Channels:
- 4
- Delay Time:
- -
- Signal Conditioning:
- Input Equalization, Output De-Emphasis
- Capacitance - Input:
- -
- Voltage - Supply:
- 1.2V
- Current - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 42-TQFN (9x3.5)
PI2EQX6812ZHEX FAQ
1.How can I place an order for PI2EQX6812ZHEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI2EQX6812ZHEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI2EQX6812ZHEX reliable?
The price and inventory of PI2EQX6812ZHEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI2EQX6812ZHEX is usually 5 days.
3.What payment methods are accepted for PI2EQX6812ZHEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI2EQX6812ZHEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI2EQX6812ZHEX?
PI2EQX6812ZHEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI2EQX6812ZHEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI2EQX6812ZHEX?
For technical support, including PI2EQX6812ZHEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI2EQX6812ZHEX requirements.
6.How does Aetrix verify that PI2EQX6812ZHEX is sourced from the original manufacturer or authorized distributors?
All PI2EQX6812ZHEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI2EQX6812ZHEX meets industry standards.
7.What is the process for return or replacement of PI2EQX6812ZHEX?
All PI2EQX6812ZHEX units undergo pre-shipment inspection (PSI). If there is an issue with PI2EQX6812ZHEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI2EQX6812ZHEX part is unused and in its original packaging.
Return procedure for PI2EQX6812ZHEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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