Diodes Incorporated PI2EQX6814NJEX
- Part No.:
- PI2EQX6814NJEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Signal Buffers, Repeaters, Splitters
- Package:
- 100-LBGA
- Datasheet:
-
PI2EQX6814NJEX.pdf
- Description:
- IC REDRIVER SAS2/SATA/XAUI LBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PI2EQX6814 from Diodes Incorporated is a 6.5Gbps 4-lane (8-channel) SAS2/SATA/XAUI ReDriver™ with programmable equalization, de-emphasis, and input threshold control. It operates from a single 1.2V ±5% supply, delivers 95mA typical active current per channel, supports industrial temperature range (−40°C to +85°C), and integrates loopback, mux/demux, and OOB signaling for backplane and switch-fabric signal integrity enhancement in enterprise storage systems.
For engineers reviewing the PI2EQX6814 datasheet, PI2EQX6814 pinout, PI2EQX6814 application, or PI2EQX6814 equivalent, key selection criteria include differential CML I/O compatibility (100-Ω), independent per-channel configuration via I²C or pin strapping, slumber/standby power management modes, and support for both half-bit and full-bit de-emphasis across SAS2, SATA III, and XAUI protocols.
Technical Context
The PI2EQX6814 implements dual-path signal conditioning: an adjustable 8-level input equalizer (0.8–13.8dB boost at 3.0GHz) compensates for high-frequency loss pre-ReDriver, while configurable output de-emphasis (0–7.5dB) pre-compensates for post-ReDriver channel loss. Each of its eight differential channels uses CML I/O with internal 50-Ω termination and supports independent enable/disable via I²C registers.
Configuration is flexible: MODE pin selects between pin-strapped (grouped A/B lane settings) or I²C-controlled (per-channel granularity) operation. Loopback, input squelch (via VTH register, 40–180mVppd threshold), and automatic slumber mode (10mA/channel idle current) are hardware- and register-accessible features enabling robust testability and dynamic power optimization in multi-lane interconnects.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 6.5Gbps - supports full-speed SAS2, SATA III (6Gbps), and XAUI (3.125Gbps ×4) without protocol translation |
| Channel Count | 8 differential channels (4 lanes) - enables simultaneous conditioning of dual 4-lane links (e.g., A-side and B-side SAS ports) |
| Supply Voltage | 1.2V ±5% - single-rail operation reduces board-level power delivery complexity vs. multi-voltage ReDrivers |
| Active Current | 95mA per channel (typical) - defines thermal budget for 8-channel operation at full data rate |
| Slumber Current | 10mA per channel (typical) - low-power idle state triggered automatically during receiver electrical idle |
| Standby Current | 1mA (total device, typical) - achieved via PD# pin assertion, disabling all I/O and logic |
| Operating Temp | −40°C to +85°C - qualified for enterprise server, storage controller, and telecom infrastructure environments |
| I²C Interface | 100kbps, 7-bit address, 3.3V-tolerant SCL/SDA - allows daisy-chaining multiple devices with A0/A1/A4 address pins |
Pinout & Package
Package: 100-contact LBGA (11mm × 11mm), Pb-free and RoHS-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0RX+/A0RX− | CML Input (Channel A0) | Differential receiver pair with internal 50-Ω pull-down; enters Hi-Z in power-down mode |
| A0TX+/A0TX− | CML Output (Channel A0) | Differential transmitter pair with internal 50-Ω pull-up; enters Hi-Z in power-down mode |
| PD# | Power-Down Control | Active-low input; forces full device shutdown (1mA standby) and disables all I/O |
| MODE | Configuration Mode Select | LVCMOS input; high = pin-strapped config, low = I²C register programming enabled |
| SCL/SDA | I²C Interface | 3.3V-tolerant serial bus interface for per-channel register access and dynamic reconfiguration |
| SEL[2:0]_A | Equalizer Control (Group A) | 3-bit strap for 8-level input equalization (0.8–13.8dB) applied identically to A0–A3 channels |
| D1_A/D2_A | De-emphasis Control (Group A) | 2-bit strap selecting 0/3.5/5.5/7.5dB output de-emphasis for A0–A3 channels |
| SIG_A | Signal Detect Output | Open-drain flag indicating valid differential input > VTH threshold on Channel A0 |
Key Features
| Feature | Design Value |
|---|---|
| Per-channel I²C programmability | Enables independent equalization, de-emphasis, swing, and enable/disable control for all 8 channels |
| Automatic slumber mode | Reduces per-channel current from 95mA to 10mA during receiver idle without host intervention |
| Configurable input threshold (VTH) | 8-step adjustment (40–180mVppd) prevents false triggering from noise or marginal signal levels |
| Mux/demux and loopback support | Hardware-enabled test modes (e.g., A0RX→B0TX) simplify PCB validation and system diagnostics |
| OOB (Out-of-Band) signaling compliance | Preserves SAS/SATA sideband communication integrity during link training and initialization |
| 1.2V single-supply operation | Eliminates need for auxiliary voltage rails, reducing power delivery component count and layout area |
Applications
| Enterprise SAS Storage Controllers | High-Density Server Backplanes |
|---|---|
|
Use Scenario: Signal integrity restoration across 20+ inch FR4 backplane traces between SAS expander and drive trays. IC Role / Device Role / Timing Role: ReDriver™ placed mid-path to equalize attenuated RX signals and de-emphasize TX signals before reaching the SAS initiator. Use Value: Enables reliable 6.5Gbps operation over legacy backplanes without redesigning trace impedance or layer stackup. |
Use Scenario: Interconnecting dual 4-lane SAS ports on a modular server motherboard with hot-swap drive bays. IC Role / Device Role / Timing Role: Dual-lane ReDriver providing independent conditioning for A-side (host-facing) and B-side (expander-facing) links. Use Value: Maintains eye opening margin under crosstalk and jitter accumulation across dense connector interfaces. |
| SATA III RAID Controller Add-in Cards | XAUI-Based Network Switch Fabric Interfaces |
|
Use Scenario: Extending SATA III signals from PCIe-to-SATA bridge IC to front-panel drive connectors on a 1U rackmount card. IC Role / Device Role / Timing Role: Signal repeater with adjustable input threshold to reject noise from shared chassis ground paths. Use Value: Prevents spurious link drops during concurrent drive spin-up by suppressing low-level common-mode noise. |
Use Scenario: Bridging XAUI PHYs between packet processor ASIC and line-card SerDes in a 10GbE modular switch. IC Role / Device Role / Timing Role: Protocol-transparent analog ReDriver restoring signal amplitude and timing margin across mid-board routing. Use Value: Achieves bit-error-rate <1e−12 at 3.125Gbps without requiring retiming or clock-data recovery. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ReDriver™ applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PI3EQX1204-C | Higher 12.8Gbps data rate; supports SAS3/PCIe 3.0; 1.8V I/O compatible; different pinout and register map | Required for new designs targeting 12G SAS or PCIe Gen3; not drop-in compatible due to voltage and protocol differences | Select PI3EQX1204-C when upgrading to SAS3 or needing backward-compatible 6Gbps operation with future-proof bandwidth headroom. |
| DS100BR410 | TI device with integrated CDR; 10.3125Gbps max; requires external reference clock; higher power (125mA/channel) | Used where clock-data recovery is mandatory (e.g., long-reach optical modules); adds latency vs. pure ReDriver | Choose DS100BR410 only if CDR functionality is required; otherwise PI2EQX6814 offers lower latency and simpler power architecture. |
Compared with PI3EQX1204-C, the PI2EQX6814 provides optimized cost and power for established 6Gbps SAS/SATA systems, while DS100BR410 introduces unnecessary CDR complexity and power overhead where signal regeneration alone suffices.
Availability
PI2EQX6814 is available at Aetrix Electronics and suitable for enterprise storage controllers, high-density server backplanes, and SATA III RAID add-in cards requiring stable component supply and long-term industrial lifecycle support.
Supply support for PI2EQX6814 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance signal integrity, power management, and protection solutions for industrial and computing markets.
The PI2EQX6814 belongs to Diodes' ReDriver™ product line, engineered specifically to extend reach and improve reliability of high-speed serial links in enterprise storage and networking infrastructure without adding protocol-layer complexity.
FAQ
What is the maximum supported data rate for PI2EQX6814?
The PI2EQX6814 supports up to 6.5Gbps per lane, fully compliant with SAS2 (6Gbps), SATA III (6Gbps), and XAUI (3.125Gbps ×4) standards. Its equalization and de-emphasis circuitry are characterized and validated at this rate across the full industrial temperature range and specified supply tolerance.
Does PI2EQX6814 require an external clock or reference signal?
No. The PI2EQX6814 is a pure analog ReDriver™ with no clock-data recovery (CDR) function; it operates without any external clock or reference signal. Signal regeneration is achieved through adaptive equalization and fixed-gain amplification, preserving native timing characteristics of the input data stream.
How does the automatic slumber mode activate and what is its impact on signal path?
Slumber mode activates automatically when the receiver detects electrical idle (no valid signal above VTH threshold) for a defined duration. It disables the transmitter output stage only-receiver equalization remains active-reducing per-channel current from 95mA to 10mA while maintaining readiness to resume transmission upon signal detection.
Can PI2EQX6814 be used in PCIe Gen2 applications?
While not officially qualified for PCIe Gen2, the PI2EQX6814's 6.5Gbps capability, CML I/O compatibility, and 50-Ω termination align with PCIe Gen2 electrical requirements (5GT/s). However, Diodes does not guarantee PCIe protocol compliance or provide PCIe-specific validation data; use requires full system-level interoperability testing.
PI2EQX6814NJEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- ReDriver™
- Package/Case:
- 100-LBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Buffer, ReDriver
- Applications:
- SAS2, SATA, XAUI
- Input:
- CML
- Output:
- CML
- Data Rate (Max):
- 6.5Gbps
- Number of Channels:
- 4
- Delay Time:
- -
- Signal Conditioning:
- -
- Capacitance - Input:
- -
- Voltage - Supply:
- 1.2V
- Current - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 100-LBGA (11x11)
PI2EQX6814NJEX FAQ
1.How can I place an order for PI2EQX6814NJEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI2EQX6814NJEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI2EQX6814NJEX reliable?
The price and inventory of PI2EQX6814NJEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI2EQX6814NJEX is usually 5 days.
3.What payment methods are accepted for PI2EQX6814NJEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI2EQX6814NJEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI2EQX6814NJEX?
PI2EQX6814NJEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI2EQX6814NJEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI2EQX6814NJEX?
For technical support, including PI2EQX6814NJEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI2EQX6814NJEX requirements.
6.How does Aetrix verify that PI2EQX6814NJEX is sourced from the original manufacturer or authorized distributors?
All PI2EQX6814NJEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI2EQX6814NJEX meets industry standards.
7.What is the process for return or replacement of PI2EQX6814NJEX?
All PI2EQX6814NJEX units undergo pre-shipment inspection (PSI). If there is an issue with PI2EQX6814NJEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI2EQX6814NJEX part is unused and in its original packaging.
Return procedure for PI2EQX6814NJEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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