Diodes Incorporated PI2EQXDP101-AZFEX
- Part No.:
- PI2EQXDP101-AZFEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Signal Buffers, Repeaters, Splitters
- Package:
- 36-WFQFN Exposed Pad
- Datasheet:
-
PI2EQXDP101-AZFEX.pdf
- Description:
- IC REDRIVER DISPLAYPORT 36TQFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PI2EQXDP101-AZFEX from Pericom Semiconductor is a 1:1 DisplayPort™ 1.1a ReDriver IC supporting 4-lane operation at 2.7 Gbps per lane (10.8 Gbps aggregate), with programmable output swing (4 levels), pre-emphasis (4 levels), and automatic AUX-based link reconfiguration. It operates on dual supplies (1.5 V and 3.3 V), features 2 kV HBM ESD protection, and enables dual-mode DP/TMDS via AUX/DDC pass-through and CAD pin detection in notebook docking and embedded display interconnects.
For engineers reviewing the PI2EQXDP101-AZFEX datasheet, PI2EQXDP101-AZFEX pinout, PI2EQXDP101-AZFEX application, or PI2EQXDP101-AZFEX equivalent, key selection criteria include AUX-interpretive lane count/bandwidth control, low insertion loss on AUX path (0.35 dB @1 Mbps), HPD-triggered power-down, and 36-pin TQFN (ZF) package compatibility with high-density PCB layouts.
Technical Context
The PI2EQXDP101-AZFEX implements a fully autonomous AUX channel interpreter that decodes DPCD registers (00100h–00106h) to dynamically configure output swing, pre-emphasis, and active lane count without host CPU intervention. Its equalizer architecture compensates for channel loss while preserving signal integrity across long or lossy DP traces.
It supports both reduced bit rate (1.62 Gbps) and high bit rate (2.7 Gbps) modes per DisplayPort 1.1a, with jitter elimination achieved through adaptive training-path adjustment of drive strength and pre-emphasis. The device enters low-power mode when HPD is LOW or no data signal is present-even with an attached monitor-reducing standby current to 10 mA on VDD15 and 0.1 mA on VDD33.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Data Rate | 2.7 Gbps per lane (HBR), 1.62 Gbps per lane (RBR); enables full DisplayPort 1.1a compliance for UHD video transport. |
| Lane Count | Configurable 1/2/4 lanes via DPCD LANE_COUNT_SET register; supports scalable bandwidth allocation for embedded or portable systems. |
| Output Swing | 4 programmable levels (340–1380 mVpp); matches receiver sensitivity across varying trace lengths and connector losses. |
| Pre-emphasis | 4 levels (0/3.5/6.0/9.5 dB); mitigates high-frequency loss in >15 cm FR4 traces without external tuning. |
| AUX Path Loss | 0.35 dB @1 Mbps; preserves I²C/DDC timing margins during EDID reads and link training handshakes. |
| Power Supplies | Separate 1.5 V ±5% (VDD15) and 3.3 V ±5% (VDD33); isolates analog driver noise from digital logic rails. |
| ESD Protection | 2 kV HBM on all pins; meets IEC 61000-4-2 Level 2 for robustness in consumer docking station environments. |
Pinout & Package
PI2EQXDP101-AZFEX is housed in a 36-pin Pb-free & Green TQFN (ZF) package (5 mm × 5 mm × 0.8 mm), with exposed thermal pad (center pad = GND) for enhanced thermal dissipation in compact display interface modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN0± to IN3± (Pins 1–2,3–4,6–7,9–10) | Main Link RX differential inputs | Accept 4-lane DP input; support AC-coupled 100 Ω termination; tolerate 120–1500 mVpp input swing. |
| OUT0± to OUT3± (Pins 19–20,22–23,25–26,27–28) | Main Link TX differential outputs | Drive 4-lane DP output with programmable swing/pre-emphasis; 50 Ω on-chip termination disableable per port. |
| AUX_SRC± (Pins 32–33), DDC_SCL/AUX+, DDC_SDA/AUX− (Pins 30–31,34–35) | AUX/DDR bidirectional channel | Pass-through AUX commands for link training; switch between DP (AUX±) and TMDS (I²C SCL/SDA) modes using CAD pin. |
| HPD_Sink (Pin 15), HPDSRC (Pin 13) | Hot Plug Detect interface | Monitor sink HPD status; assert source HPD to upstream GPU; enable automatic power-down when HPD = LOW. |
| CAD_Sink (Pin 14), CAD (Pin 12) | Cable Detect signaling | Detect DP cable presence via Pin 13 of DP connector; toggle ReDriver between DP and TMDS (HDMI) mode automatically. |
| VDD15 (Pins 5,11,17,21,29), VDD33 (Pin 36) | Power supply rails | Independent 1.5 V (analog/driver) and 3.3 V (digital/control) domains reduce cross-talk and improve jitter performance. |
Key Features
| Feature | Design Value |
|---|---|
| AUX Command Interpreter | Decodes DPCD registers (00100h–00106h) to auto-configure lane count, bandwidth, and pre-emphasis-no firmware required. |
| Dual-Mode DP/TMDS Support | Uses CAD pin to switch AUX/DDC routing between DisplayPort native mode and HDMI-compatible TMDS mode via same physical interface. |
| Adaptive Power Management | Enters low-power state when HPD is LOW or main link is idle-cuts VDD15 current to 10 mA and VDD33 to 0.1 mA. |
| Low-Loss AUX Path | 0.35 dB insertion loss at 1 Mbps ensures reliable EDID reads and link training over extended AUX traces. |
| On-Chip 50 Ω Termination | Configurable per-port termination disable allows flexible layout options where external termination is preferred. |
Applications
| Embedded Display Interconnect | Notebook Docking Station |
|---|---|
Use Scenario: Connecting eDP or LVDS display panels to DP source in thin-client or industrial HMIs. IC Role / Device Role / Timing Role: ReDriver restores eye opening degraded by long flex cables or multi-layer PCB routing. Use Value: Enables 4-lane 2.7 Gbps operation over 20+ cm FR4 traces while maintaining <0.32 UIp-p total jitter at Tx output. | Use Scenario: Adding DP output to USB-C or Thunderbolt docks supporting dual 4K monitors. IC Role / Device Role / Timing Role: Signal conditioner between GPU and DP receptacle; handles AUX-based link negotiation and HPD propagation. Use Value: Supports hot-plug detection, cable detect-driven DP/TMDS mode switching, and <20 mW standby power for energy certification. |
| Desktop Graphics Adapter | Medical Imaging Display Hub |
Use Scenario: Extending DP reach from discrete GPU to front-panel or remote display ports. IC Role / Device Role / Timing Role: Redriving main link and transparently passing DDC/AUX for EDID and MST management. Use Value: Maintains 0.726 UI minimum TX eye width at 2.7 Gbps, ensuring robust link training even with marginal source drivers. | Use Scenario: Aggregating multiple diagnostic imaging sources (MRI, CT) into a single high-res surgical display wall. IC Role / Device Role / Timing Role: Repeater-level signal integrity restoration across isolated medical-grade cabling. Use Value: 2 kV HBM ESD rating and 0–85°C operating range meet IEC 60601-1 safety and thermal requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar DisplayPort ReDriver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPD12S016 | Integrated level shifter + ESD protection; no AUX interpretation; fixed 2.7 Gbps operation; supports only 2-lane DP. | Targeted at HDMI/DP dual-mode source-side protection, not link reconfiguration. | Select when ESD/clamp functionality is primary need and dynamic lane/swing control is unnecessary. |
| Diodes AP1361 | Single-lane ReDriver; no AUX register parsing; supports only RBR (1.62 Gbps); no CAD-based TMDS mode. | Designed for cost-sensitive embedded displays with fixed low-bandwidth links. | Select for simple point-to-point DP extension where DPCD-based adaptation adds no value. |
Compared with TPD12S016 and AP1361, PI2EQXDP101-AZFEX uniquely delivers full DPCD-aware link adaptation-including 4-lane HBR support, 4-level swing/pre-emphasis, and CAD-triggered dual-mode operation-making it the only choice for intelligent, self-configuring DP interconnects requiring minimal host software involvement.
Availability
PI2EQXDP101-AZFEX is available at Aetrix Electronics and suitable for notebook docking stations, embedded display interfaces, desktop graphics adapters, and medical imaging display hubs requiring stable component supply and long-term design-in support.
Supply support for PI2EQXDP101-AZFEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Pericom Semiconductor (acquired by Diodes Incorporated in 2016) specialized in high-speed interface solutions including PCIe, USB, HDMI, and DisplayPort signal conditioners, clock generators, and switches.
The PI2EQXDP101-AZFEX belongs to Pericom's DisplayPort ReDriver product line, engineered specifically for transparent, firmware-free link integrity restoration in space-constrained, thermally sensitive display subsystems.
FAQ
What is the function of the CAD pin on PI2EQXDP101-AZFEX?
The CAD (Cable Detect) pin (Pin 14) senses the presence of a DisplayPort cable via Pin 13 (CAD_Sink) of the DP connector. When asserted, it triggers internal logic to route AUX/DDC signals for native DP mode; when deasserted, it configures the device for TMDS (HDMI) mode by repurposing AUX pins as I²C SCL/SDA lines-enabling automatic dual-mode operation without host intervention.
Does PI2EQXDP101-AZFEX require external configuration registers or firmware?
No. PI2EQXDP101-AZFEX autonomously interprets DPCD registers (00100h–00106h) transmitted over the AUX channel during link training to configure lane count, bandwidth, output swing, and pre-emphasis levels. It has no power-on default state and requires no external I²C writes, GPIO control, or host processor involvement for basic operation.
How does PI2EQXDP101-AZFEX manage power states?
PI2EQXDP101-AZFEX enters low-power mode when HPD_Sink is LOW (monitor disconnected) or when no valid data signal is detected on input lanes-even if a monitor remains physically attached. Active current is 250 mA on VDD15 and 1.0 mA on VDD33; standby current drops to 10 mA on VDD15 and 0.1 mA on VDD33, reducing total standby power to 20 mW.
Can PI2EQXDP101-AZFEX be used in HDMI applications?
Yes-when configured in TMDS mode via the CAD pin, PI2EQXDP101-AZFEX routes DDC_SCL and DDC_SDA signals through AUX_SRC± pins, enabling HDMI source-side DDC communication. However, it does not perform HDMI protocol conversion or TMDS encoding; it serves strictly as a transparent DDC pass-through and signal conditioner for HDMI-capable DP sources using dual-mode transmitters.
PI2EQXDP101-AZFEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- ReDriver™
- Package/Case:
- 36-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Buffer, ReDriver
- Applications:
- DisplayPort
- Input:
- DisplayPort
- Output:
- DisplayPort
- Data Rate (Max):
- 2.7Gbps
- Number of Channels:
- 1
- Delay Time:
- -
- Signal Conditioning:
- Input Equalization, Output Pre-Emphasis
- Capacitance - Input:
- -
- Voltage - Supply:
- 1.5V, 3.3V
- Current - Supply:
- -
- Operating Temperature:
- 0°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-TQFN (6x5)
PI2EQXDP101-AZFEX FAQ
1.How can I place an order for PI2EQXDP101-AZFEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI2EQXDP101-AZFEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI2EQXDP101-AZFEX reliable?
The price and inventory of PI2EQXDP101-AZFEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI2EQXDP101-AZFEX is usually 5 days.
3.What payment methods are accepted for PI2EQXDP101-AZFEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI2EQXDP101-AZFEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI2EQXDP101-AZFEX?
PI2EQXDP101-AZFEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI2EQXDP101-AZFEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI2EQXDP101-AZFEX?
For technical support, including PI2EQXDP101-AZFEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI2EQXDP101-AZFEX requirements.
6.How does Aetrix verify that PI2EQXDP101-AZFEX is sourced from the original manufacturer or authorized distributors?
All PI2EQXDP101-AZFEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI2EQXDP101-AZFEX meets industry standards.
7.What is the process for return or replacement of PI2EQXDP101-AZFEX?
All PI2EQXDP101-AZFEX units undergo pre-shipment inspection (PSI). If there is an issue with PI2EQXDP101-AZFEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI2EQXDP101-AZFEX part is unused and in its original packaging.
Return procedure for PI2EQXDP101-AZFEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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