Diodes Incorporated PI3EQX1004B1ZHEX

Overview

PI3EQX1004B1ZHEX from Diodes Incorporated is a 10.0 Gbps 2-port USB 3.1 Gen-2 linear ReDriver IC with four 100Ω differential CML I/O pairs, programmable pin-adjustable equalization and flat gain, and automatic receiver detection. It operates from a single 3.3V supply, supports independent channel operation, and enables signal integrity restoration across PCB traces, cables, or switch fabrics in high-speed USB host-peripheral interconnects.

For engineers reviewing the PI3EQX1004B1ZHEX datasheet, PI3EQX1004B1ZHEX pinout, PI3EQX1004B1ZHEX application, or PI3EQX1004B1ZHEX equivalent, key selection criteria include differential CML I/O compatibility, 10Gbps per-lane throughput, slumber-mode power management, and USB 3.1 Gen-2 protocol compliance for embedded host, docking, and peripheral extension designs.

Technical Context

The PI3EQX1004B1ZHEX implements a linear redriving architecture with per-channel analog equalization (EQ) and flat gain (FG) stages, each controlled by external resistor networks to tune frequency response for varying channel loss profiles. Its input-level detection logic autonomously enables/disables output buffers based on signal presence.

Each of the two ports comprises two differential lanes (TX/RX), supporting full-duplex 10Gbps USB 3.1 Gen-2 signaling. The integrated receiver detect loop monitors idle duration (>7.3ms) to transition channels into Unplug Mode or Low Power (Slumber) Mode, reducing quiescent current without host intervention.

Key Specifications

Pinout & Package

Package: 42-pin TQFN, 3.5 mm × 9.0 mm, 0.5 mm pitch, ZH42 footprint (exposed thermal pad).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar USB 3.1 Gen-2 redriving applications.

Compared with TI TUSB1002A and Microchip USB3102, the PI3EQX1004B1ZHEX offers tunable analog equalization and slumber-mode power savings ideal for thermally constrained, multi-lane USB-C docks and enclosures requiring protocol transparency and low standby current.

Availability

PI3EQX1004B1ZHEX is available at Aetrix Electronics and suitable for USB-C docking stations, external NVMe SSD enclosures, and industrial vision cameras requiring stable component supply, USB-IF compliance assurance, and production-ready signal integrity performance.

Supply support for PI3EQX1004B1ZHEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and interface solutions for computing, consumer, and industrial markets.

The PI3EQX1004B1ZHEX belongs to Diodes' Pericom-branded high-speed interface product line, designed specifically to solve signal integrity challenges in USB 3.1 Gen-2, PCIe, and DisplayPort interconnects with minimal latency and power.

FAQ

What is the function of the EN_AB and EN_CD pins?

EN_AB and EN_CD are active-high enable inputs controlling power delivery to Port A/B and Port C/D respectively. When pulled low, the corresponding two lanes enter power-down mode with output drivers disabled and bias currents shut off. This allows selective lane gating in multi-port systems to reduce total system power consumption without affecting enabled channels.

Does the PI3EQX1004B1ZHEX require configuration via I²C or other serial interface?

No. The PI3EQX1004B1ZHEX uses resistor-based pin programming for equalization and flat gain settings - no firmware, registers, or serial bus is needed. All operational parameters are set at power-up via external resistors connected to EQ_A–D and FG_A–D pins, making it inherently deterministic and immune to software boot dependencies.

Can this device be used with USB 3.0 (5 Gbps) signals?

Yes. The PI3EQX1004B1ZHEX is backward compatible with USB 3.0 (5 Gbps) and automatically adapts its equalization and gain response to lower data rates. Its linear architecture preserves signal fidelity across both Gen-1 and Gen-2 modes without reconfiguration, and it passes USB-IF compliance testing for both specifications.

How does the automatic receiver detect feature interact with USB link training?

The receiver detect circuit operates independently of USB link training. It monitors raw differential input activity - not protocol packets - and triggers Slumber Mode only after 7.3ms of signal absence. During active link training or traffic, detection is suspended, ensuring uninterrupted enumeration and high-speed handshake sequences without false power-down events.