Diodes Incorporated PI3EQX2024ZTFEX
- Part No.:
- PI3EQX2024ZTFEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Signal Buffers, Repeaters, Splitters
- Package:
- 34-UFQFN Exposed Pad
- Datasheet:
-
PI3EQX2024ZTFEX.pdf
- Description:
- USB3 EQX U-QFN2545-34 T&R 3.5K
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PI3EQX2024ZTFEX from Diodes Incorporated is a USB 3.2 Gen 2x2 linear ReDriver IC designed for high-speed signal integrity restoration in host-to-peripheral interconnects. It supports dual-lane 10 Gbps differential signaling (20 Gbps aggregate), features pin-selectable 4-level equalization (up to 14.6 dB at 5 GHz) and flat gain (±2.7 dB), operates from a single 3.3 V supply, and delivers <2 ns latency in active mode - deployed in notebook USB-C docking stations requiring cable-length extension and jitter suppression.
For engineers reviewing the PI3EQX2024ZTFEX datasheet, PI3EQX2024ZTFEX pinout, PI3EQX2024ZTFEX application, or PI3EQX2024ZTFEX equivalent, key selection criteria include CML I/O compatibility with USB 3.2 Gen 2x2 PHYs, adaptive slumber/unplug power states (<1.2 µA deep slumber current), 34-pin UQFN package footprint constraints, and programmable EQ/FG settings for channel-specific signal optimization across PCB traces and passive cables.
Technical Context
The PI3EQX2024 implements four independent linear ReDriver channels, each with fully decoupled input equalization and DC flat gain control via dedicated 4-level pins (EQA–EQD, FGA–FGD). Its architecture avoids decision-feedback or clock-data recovery, preserving USB protocol transparency while compensating for frequency-dependent loss up to 5 GHz.
Power management is hierarchical: automatic receiver detection triggers slumber mode after 1.3 ms inactivity, deep slumber after 6 ms, and unplug mode after 7.3 ms - all with distinct termination configurations (e.g., 67kΩ to GND in unplug mode) and sub-µA quiescent current. Input and output terminations are configurable per channel between 50Ω/VDD, 6kΩ/VbiasTx, 270kΩ/VbiasRx, or 67kΩ/GND.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Protocol Support | USB 3.2 Gen 2x2 (20 Gbps aggregate), backward compatible with Gen 2 (10 Gbps) and Gen 1 (5 Gbps) |
| Equalization Range | 0–14.6 dB at 5 GHz (4 selectable levels via external resistors or open/VDD/GND ties) |
| Flat Gain Range | −1.6 dB to +2.7 dB (4-level DC gain control independent of EQ setting) |
| Latency | ≤2 ns propagation delay - preserves USB link training timing budgets without violating protocol margins |
| Supply Voltage | 3.3 V ±0.3 V - matches standard USB host-side power rails; no auxiliary voltage required |
| Active Current | 260–334 mA at 10 Gbps - enables thermal design for compact UQFN (2.5 mm × 4.5 mm) layout |
| Deep Slumber Current | 0.8–1.2 µA - extends battery life in portable devices during USB link idle periods |
Pinout & Package
Package: 34-pin Ultra Thin Quad Flat No-Lead (UQFN), 2.5 mm × 4.5 mm body, 0.4 mm pitch, exposed thermal pad (ZTF34).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RXAP/RXAN, RXBP/RXBN, RXCP/RXCN, RXDP/RXDN | CML differential inputs | Accept 100 Ω differential signals; internal termination selectable (50 Ω/VDD, 270 kΩ/VbiasRx, or 67 kΩ/GND) for impedance matching to source PHY |
| TXAP/TXAN, TXBP/TXBN, TXCP/TXCN, TXDP/TXDN | CML differential outputs | Drive 100 Ω differential loads; output termination configurable to match cable or connector impedance |
| EQA–EQD, FGA–FGD | 4-level analog control inputs | Set equalization/gain per channel using resistor dividers (0/R/F/1 codes); internal pull-up/pull-down resistors enable default biasing |
| EN | Channel enable input | High = normal operation; low = power-down mode (20–120 µA); internal 300 kΩ pull-up ensures default active state |
| VDD (pins 13,17,30,34) | Power supply | 3.3 V supply for all four channels; multiple pins reduce IR drop and improve PSRR |
| GND (pins 3,10,20,27, center pad) | Ground reference | Low-inductance return path; center thermal pad enhances thermal dissipation in high-current operation |
Key Features
| Feature | Design Value |
|---|---|
| Linear ReDriver architecture | Preserves USB 3.2 protocol transparency without retiming or CDR - avoids link-layer retraining delays and maintains native LFPS signaling |
| Per-channel adaptive power states | Independent slumber/unplug detection per lane (1.3 ms / 6 ms / 7.3 ms timeouts) enables granular power gating in multi-lane USB-C links |
| Configurable I/O termination | Four termination options per input/output pair allow optimization for FR4 trace loss, passive cable attenuation, or connector reflections |
| Input-referred noise | 0.5–0.6 mVRMS (100 MHz–5 GHz, EQ=1/FG=1) - maintains SNR margin for 10 Gbps eye opening >0.625 UI |
| Patented equalization circuitry | Compensates intersymbol interference with frequency-dependent peaking (12.4 dB typical at 5 GHz) while minimizing added jitter |
Applications
| USB-C Docking Stations | Notebook Internal USB 3.2 Routing |
|---|---|
|
Use Scenario: Extending USB 3.2 Gen 2x2 signals from laptop SoC to external Type-C port through 80 mm FR4 traces with >12 dB loss at 5 GHz. IC Role / Device Role / Timing Role: Linear ReDriver restoring signal integrity pre-cable; no clock recovery to preserve USB link training handshake timing. Use Value: Enables full 20 Gbps bandwidth over cost-effective 4-layer PCB without expensive high-speed materials or impedance-controlled stackups. |
Use Scenario: Bridging USB 3.2 controller to internal SSD M.2 slot with 120 mm trace length and 9 dB insertion loss at 5 GHz. IC Role / Device Role / Timing Role: Per-lane signal booster placed adjacent to M.2 connector; EQ/FG tuned to compensate board-level loss without altering protocol timing. Use Value: Achieves compliant USB 3.2 Gen 2x2 eye diagram (0.646 UI @10 Gbps) at SSD interface, eliminating need for PHY re-layout. |
| USB 3.2 Gen 2x2 External Storage Enclosures | Tablet-to-Monitor USB-C Video+Data Hubs |
|
Use Scenario: Driving 1-meter passive USB-C cable from host controller to NVMe enclosure with 15 dB loss at 5 GHz. IC Role / Device Role / Timing Role: Cable-compensation ReDriver on host side; auto-slumber reduces power when enclosure is disconnected. Use Value: Maintains 10 Gbps per lane over standard-certified cables; unplug detection (67kΩ Rx termination) enables fast hot-plug response. |
Use Scenario: Supporting simultaneous DisplayPort Alt Mode + USB 3.2 Gen 2x2 data over single USB-C cable in tablet dock. IC Role / Device Role / Timing Role: Isolating and boosting USB data lanes independently from DP lanes; low crosstalk (<−40 dB NEXT) prevents video corruption. Use Value: Prevents USB data errors during high-bandwidth DP video streaming by suppressing differential near-end crosstalk between adjacent lanes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar USB 3.2 Gen 2x2 ReDriver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TUSB216IRWBR | Single-lane USB 3.2 Gen 2 (10 Gbps); no Gen 2x2 support; fixed EQ; 20-pin WQFN | Limited to 10 Gbps aggregate; unsuitable for dual-lane 20 Gbps use cases like USB-C docks | Select only for cost-sensitive single-lane applications where Gen 2x2 bandwidth is unnecessary |
| Renesas uPD720212 | USB 3.2 Gen 2x2 hub controller (not ReDriver); includes embedded PHY, packet routing, and PCIe interface | Requires firmware integration and host driver support; adds protocol layer complexity vs. transparent analog boost | Choose when system needs USB hub functionality (multi-port expansion), not just signal restoration |
Compared with TI TUSB216IRWBR and Renesas uPD720212, the PI3EQX2024ZTFEX uniquely delivers dual-lane 10 Gbps linear amplification with zero protocol intervention, enabling plug-and-play signal restoration in space-constrained USB-C endpoints where latency, power, and layout simplicity are critical.
Availability
PI3EQX2024ZTFEX is available at Aetrix Electronics and suitable for USB-C docking stations, notebook internal signal routing, external NVMe enclosures, and tablet-to-monitor hubs requiring stable component supply and RoHS-compliant, halogen-free packaging.
Supply support for PI3EQX2024ZTFEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and connectivity solutions for consumer, computing, and industrial markets.
The PI3EQX2024 belongs to Diodes' ReDriver™ product line, engineered specifically for high-speed serial interface signal integrity restoration - targeting USB, PCIe, and SATA applications where transparent analog boosting replaces complex retiming architectures.
FAQ
What USB protocols does the PI3EQX2024ZTFEX support?
The PI3EQX2024ZTFEX supports USB 3.2 Gen 2x2 (20 Gbps aggregate), Gen 2 (10 Gbps), and Gen 1 (5 Gbps) protocols. It operates as a linear ReDriver - preserving native USB signaling including LFPS, training sequences, and link power states without retiming or protocol interpretation.
How is equalization configured on the PI3EQX2024ZTFEX?
Equalization is set per channel using dedicated 4-level input pins (EQA–EQD). Each pin accepts resistor ties to GND (0), 68 kΩ to GND (R), open (F), or VDD (1), selecting EQ values from 6.7–14.6 dB at 2.5 GHz and 8.0–14.6 dB at 5 GHz - enabling precise compensation for varying channel loss profiles.
Does the PI3EQX2024ZTFEX require an external clock or reference?
No. The PI3EQX2024ZTFEX is a clockless linear ReDriver and requires no external clock, reference oscillator, or configuration interface. All operation - including equalization, gain, power state transitions, and receiver detection - is autonomous and analog-based, simplifying system integration.
What is the thermal pad connection requirement for the ZTF package?
The exposed thermal pad (center pad) must be soldered to a solid copper thermal plane on the PCB for effective heat dissipation. Diodes recommends a minimum 6×6 mm thermal pad area with ≥4 thermal vias (0.3 mm diameter, spaced ≤1 mm apart) connecting to inner ground planes to maintain junction temperature ≤125°C at full 334 mA active current.
PI3EQX2024ZTFEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 34-UFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Buffer, ReDriver
- Applications:
- USB
- Input:
- CML
- Output:
- CML
- Data Rate (Max):
- 10Gbps
- Number of Channels:
- 4
- Delay Time:
- -
- Signal Conditioning:
- Input Equalization
- Capacitance - Input:
- -
- Voltage - Supply:
- 3V ~ 3.6V
- Current - Supply:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 34-UTQFN (2.5x4.5)
PI3EQX2024ZTFEX FAQ
1.How can I place an order for PI3EQX2024ZTFEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI3EQX2024ZTFEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI3EQX2024ZTFEX reliable?
The price and inventory of PI3EQX2024ZTFEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI3EQX2024ZTFEX is usually 5 days.
3.What payment methods are accepted for PI3EQX2024ZTFEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI3EQX2024ZTFEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI3EQX2024ZTFEX?
PI3EQX2024ZTFEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI3EQX2024ZTFEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI3EQX2024ZTFEX?
For technical support, including PI3EQX2024ZTFEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI3EQX2024ZTFEX requirements.
6.How does Aetrix verify that PI3EQX2024ZTFEX is sourced from the original manufacturer or authorized distributors?
All PI3EQX2024ZTFEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI3EQX2024ZTFEX meets industry standards.
7.What is the process for return or replacement of PI3EQX2024ZTFEX?
All PI3EQX2024ZTFEX units undergo pre-shipment inspection (PSI). If there is an issue with PI3EQX2024ZTFEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI3EQX2024ZTFEX part is unused and in its original packaging.
Return procedure for PI3EQX2024ZTFEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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