Diodes Incorporated PI3EQX6801AZDEX

Overview

PI3EQX6801AZDEX from Diodes Incorporated is a dual-channel, 6.5Gbps SATA/SAS ReDriver™ with programmable analog equalization (0–16 dB), adjustable output swing (400–1200 mV_pp), and CML I/O (100 Ω differential). It operates at 1.5V or 3.3V, delivers 162 mW active power at 1.5V, and supports auto HDD rate detection and OOB signaling in server backplane signal integrity extension.

For engineers reviewing the PI3EQX6801AZDEX datasheet, PI3EQX6801AZDEX pinout, PI3EQX6801AZDEX application, or PI3EQX6801AZDEX equivalent, key selection criteria include per-channel independent enable control (A_EN#/B_EN#), analog-configurable emphasis/slew via external resistors (A_EM/B_EM, A_OS/B_OS), and slumber mode entry/exit timing (10 µs ON / 6 ns OFF) for low-latency power management in high-speed storage interconnects.

Technical Context

The PI3EQX6801AZDEX implements two fully independent CML ReDriver channels with integrated limiting amplifiers, analog equalization circuits, and input signal-level detection with squelch. Each channel features tri-level EQ control (4/8/16 dB), continuous-output swing adjustment (via 2–5.5 kΩ resistors), and pre-emphasis tuning (0–6 dB).

It supports dual-supply operation (1.5V or 3.3V), with dedicated VDD15/VDD33 pins and DNC mapping per voltage mode. Auto slumber mode activates on electrical idle and exits within 6 ns of signal activity, enabling dynamic power scaling without compromising 6.5Gbps link recovery latency.

Key Specifications

Pinout & Package

Package: 20-contact TQFN (4 mm × 4 mm, 0.5 mm pitch), exposed thermal pad (GND), RoHS-compliant, tape-and-reel (ZDEX suffix).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ReDriver applications.

Compared with TI TUSB544 and Maxim MAX9278, the PI3EQX6801AZDEX uniquely combines dual-channel 6.5Gbps SATA/SAS support, analog configurability, OOB-aware squelch, and sub-20 ns slumber wake-making it the only drop-in solution for enterprise storage signal extension where protocol fidelity and power-aware latency matter.

Availability

PI3EQX6801AZDEX is available at Aetrix Electronics and suitable for enterprise storage backplanes, SAS host bus adapters, and high-density JBOD enclosures requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for PI3EQX6801AZDEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal ICs for power management, signal integrity, and connectivity applications.

The PI3EQX6801AZDEX belongs to Diodes' ReDriver™ product line, engineered specifically for high-speed serial interface signal restoration in storage, server, and data center infrastructure where low jitter, flexible configuration, and multi-protocol compatibility are critical.

FAQ

What supply voltage configurations does the PI3EQX6801AZDEX support?

The PI3EQX6801AZDEX supports both 1.5V and 3.3V operation with distinct pin mappings: VDD15 pins (10, 20, and optionally 6/16) are used for 1.5V; VDD33 pins (10, 20) plus DNC assignment for pins 6/16 apply for 3.3V. The device maintains identical AC performance across both voltages, and internal regulators ensure stable biasing regardless of supply choice.

How does the auto slumber mode function and what is its latency impact?

Auto slumber activates automatically when both channels detect electrical idle for >10 µs, reducing power to 22.5 mW. Upon first valid signal edge, it exits slumber in ≤20 ns-preserving link-level timing budgets required by SAS-2 and SATA III specifications. This behavior is hardware-autonomous and requires no host intervention or register writes.

Can the PI3EQX6801AZDEX be used in PCIe Gen2 applications?

Yes-the PI3EQX6801AZDEX supports 5.0 Gbps data rates and meets PCIe Gen2 return loss (Sdd11_TX ≥6 dB up to 2.4 GHz) and jitter (TJ <0.37 UI) requirements. Its CML I/O, 100 Ω differential impedance, and low skew (<20 ps) make it suitable for PCIe Gen2 root port or endpoint signal extension, though it lacks PCIe-specific protocol awareness like LTSSM state handling.

What is the role of the A_EQ and B_EQ pins, and how are they configured?

A_EQ and B_EQ are tri-level analog inputs that set per-channel equalization gain: grounded = 8 dB, tied to VDD = 16 dB, and biased at VDD/2 = 4 dB (default). This configuration uses simple resistor dividers-no digital interface required-and directly controls the analog equalizer's gain stage to optimize high-frequency boost before the limiting amplifier.