Diodes Incorporated PI3PCIE3413AZHEX

Overview

PI3PCIE3413AZHEX from Diodes Incorporated is a 4-channel, 3:1 bidirectional differential PCIe 3.0 switch IC supporting 8.0 Gbps data rates, -3 dB bandwidth of 6.8 GHz, 10 ps max bit-to-bit skew, and 3.3 V supply. It routes two full PCIe 3.0 lanes (4 differential pairs) from Port A to one of three output ports (B/C/D) in server backplanes and high-speed storage interconnects.

For engineers reviewing the PI3PCIE3413AZHEX datasheet, PI3PCIE3413AZHEX pinout, PI3PCIE3413AZHEX application, or PI3PCIE3413AZHEX equivalent, key selection criteria include PCIe 3.0 signal integrity compliance, low insertion loss (-1.4 dB @ 4 GHz), power-down capability, TQFN-42 package layout compatibility, and SEL1/SEL2 decode logic for port selection.

Technical Context

The PI3PCIE3413AZHEX implements a passive analog multiplexer architecture with impedance-matched differential paths optimized for PCIe 3.0's 8 GT/s signaling. Its internal topology minimizes channel-to-channel skew and crosstalk through symmetric trace routing and controlled impedance design.

It operates bi-directionally across all four differential channels (A0–A3, B0–B3, C0–C3, D0–D3) with selectable 3:1 routing via dual SEL inputs. Power-down mode places all switches in high-impedance state, reducing standby current to 0.1 µA while maintaining isolation >−19 dB at 4 GHz.

Key Specifications

Pinout & Package

PI3PCIE3413AZHEX is housed in a 42-contact, 5 mm × 6 mm, 0.4 mm pitch Thin Quad Flat No-Lead (TQFN) package with exposed thermal pad (ZH42). Pin numbering follows top-side view with pins 1–21 on bottom row and 22–42 on top row, including dedicated ground pads (pins 18, 21, 39, 42, center pad) and dual VDD rails (pins 1, 19, 20, 38).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe 3.0 analog switching applications.

Compared with TS3USB30E and PI3DBS16412, PI3PCIE3413AZHEX delivers optimal balance of PCIe 3.0 compliance, zero-latency passive switching, and compact 42-pin TQFN packaging-making it ideal for short-reach, low-power, multi-port PCIe fanout where signal integrity must be preserved without added complexity.

Availability

PI3PCIE3413AZHEX is available at Aetrix Electronics and suitable for server backplanes, PCIe SSD expansion hubs, workstation GPU multiplexers, and automated test equipment requiring stable component supply and PCIe 3.0 Gen3 signal fidelity.

Supply support for PI3PCIE3413AZHEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and power management solutions for computing, industrial, and communications markets.

The PI3PCIE3413AZHEX belongs to Diodes' Pericom® high-speed interface product line, engineered specifically for PCIe 3.0, USB 3.0, and SATA III signal routing with emphasis on low skew, low loss, and layout-friendly packaging.

FAQ

What is the maximum supported data rate and PCIe generation for PI3PCIE3413AZHEX?

The PI3PCIE3413AZHEX supports 8.0 Gbps per lane and is fully compliant with PCI Express 3.0 specifications. Eye diagram validation confirms clean opening at both 5.0 Gbps and 8.0 Gbps, with measured bit-to-bit skew ≤10 ps and insertion loss of −1.4 dB at 4 GHz-meeting all Gen3 electrical requirements for root complex and endpoint routing.

Does PI3PCIE3413AZHEX require external termination resistors?

No external termination resistors are required. The device features internally matched 85 Ω differential impedance and is designed for direct connection to 85 Ω PCB traces. Its pinout and internal layout maintain consistent characteristic impedance across all signal paths, eliminating the need for series or parallel termination components in standard PCIe 3.0 layouts.

How does the power-down mode function and what is its impact on system power?

Setting SEL1 = SEL2 = 0 places all differential channels in high-impedance state with total supply current reduced to 0.1 µA typical. This mode disables signal path conduction while maintaining isolation >−19 dB at 4 GHz, enabling dynamic power gating in systems with hot-plug or sleep-state PCIe link management without affecting adjacent lane integrity.

Can PI3PCIE3413AZHEX be used for PCIe 4.0 applications?

No. While the −3 dB bandwidth is 6.8 GHz, PCIe 4.0 requires ≥16 GT/s (8 GHz fundamental) and stricter jitter and loss budgets. The device is characterized and qualified only for PCIe 3.0 (8 GT/s), with insertion loss rising to −2.3 dB at 5 GHz and no validation for PAM4 signaling or Tx/Rx equalization compatibility required by Gen4.