Diodes Incorporated PI4ULS5V104GAEX

Overview

PI4ULS5V104 from Diodes Incorporated is a 4-bit bidirectional voltage-level translator with automatic direction sensing, designed for low-voltage interface bridging between 1.2V/1.5V/1.8V/2.5V/3.3V and 5V domains. It features dual supply rails (VCCA: 1.2–3.6V; VCCB: 1.65–5.5V), OE-controlled 3-state outputs, and supports up to 100 Mbps data rate at 3.3V/5V operation. Used in I/O expansion, FPGA-to-peripheral interfacing, and mixed-voltage microcontroller systems.

For engineers reviewing the PI4ULS5V104 datasheet, PI4ULS5V104 pinout, PI4ULS5V104 application, or PI4ULS5V104 equivalent, key selection considerations include VCCA ≤ VCCB compliance, I_off-enabled partial power-down capability, ±2μA max input leakage, 0.8–7.4 ns propagation delay depending on rail combinations, and CSP-12 package thermal performance for space-constrained PCBs.

Technical Context

The PI4ULS5V104 implements an auto-direction-sensing architecture using edge-triggered one-shot circuits that dynamically enable PMOS/NMOS pull-up/pull-down transistors during signal transitions-eliminating external direction control. Its I_off circuitry ensures <±2 μA leakage when either VCCA or VCCB is at 0 V, enabling safe partial power-down in multi-rail systems.

Each of the four bidirectional channels operates independently with rail-referenced I/O: A-port pins (A1–A4, OE, VCCA, GND) are referenced to VCCA; B-port pins (B1–B4, VCCB) to VCCB. Output impedance varies with VCCO: ~70 Ω at 1.2–1.8V, ~50 Ω at 1.8–3.3V, and ~40 Ω at 3.3–5V, ensuring consistent signal integrity across voltage combinations.

Key Specifications

Pinout & Package

PI4ULS5V104GAEX uses a 12-pin Wafer-Level Chip-Scale Package (CSP-12), 1.37 mm × 1.87 mm, with 0.4 mm pitch and bottom-terminal layout optimized for minimal board area and thermal resistance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bidirectional level translation applications.

Compared with TXS0104E and SN74AVC4T245, PI4ULS5V104 uniquely combines automatic direction detection, rail-isolation, and sub-5-μA quiescent current-making it optimal for compact, low-power, mixed-rail embedded systems where direction logic is unavailable or undesirable.

Availability

PI4ULS5V104 is available at Aetrix Electronics and suitable for mobile SoC integration, FPGA peripheral interfacing, USB-C sideband routing, and automotive infotainment display control requiring stable component supply across extended temperature and mixed-voltage environments.

Supply support for PI4ULS5V104 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, energy-efficient components for industrial, computing, and consumer markets.

The PI4ULS5V104 belongs to Diodes' Pericom® high-speed interface product line, engineered specifically for low-latency, rail-flexible voltage translation in space- and power-constrained digital systems.

FAQ

Can PI4ULS5V104 operate with VCCA = 3.3V and VCCB = 1.8V?

No. The datasheet explicitly requires VCCA ≤ VCCB at all times. Operating with VCCA = 3.3V and VCCB = 1.8V violates this condition and may cause latch-up or permanent damage. Valid combinations include VCCA = 1.8V / VCCB = 3.3V or VCCA = 2.5V / VCCB = 5.0V.

What is the minimum pull-down resistor value for OE when tied to GND?

The OE input is referenced to VCCA and draws ≤±1 μA. To ensure reliable low-state assertion during power-up, a 10 kΩ pull-down resistor is sufficient-even with worst-case VCCA = 3.6V, resulting in only 0.36 mA current, well within driver capability.

Does PI4ULS5V104 support I²C or SMBus protocols?

No. The device lacks open-drain output structure and cannot tolerate bus contention during arbitration. Its push-pull outputs and lack of built-in slew-rate control make it unsuitable for I²C, SMBus, or 1-Wire-use dedicated I²C translators like PI4IOE5V9401 instead.

How does the automatic direction control handle simultaneous A→B and B→A transitions?

Each channel operates independently: rising/falling edges on A1 trigger local one-shot activation for A→B translation; edges on B1 trigger B→A. Simultaneous transitions on opposite sides are resolved per-channel with no cross-talk-verified by channel-to-channel skew ≤1.4 ns in worst-case conditions.