Diodes Incorporated PI6C20400AHEX

Overview

PI6C20400AHEX from Diodes Incorporated is a PCIe® 2.0-compliant 1:4 differential clock driver IC designed as a companion to the PI6C410BS clock synthesizer. It distributes a 0.7V HCSL SRC input across four differential output pairs (OUT0–OUT3) with selectable PLL or bypass mode, <50ps cycle-to-cycle jitter, and <1ps additive RMS phase jitter - deployed in Intel PCIe chipset-based server motherboard clock trees.

For engineers reviewing the PI6C20400AHEX datasheet, PI6C20400AHEX pinout, PI6C20400AHEX application, or PI6C20400AHEX equivalent, key selection criteria include differential output skew control (<50ps), SMBus-programmable PLL bandwidth, tristate enable per output group, and dual 3.3V supply domains (VDD/VDD_A) for noise isolation in high-speed timing distribution.

Technical Context

The PI6C20400A implements a current-mode HCSL output buffer with external IREF resistor setting (475Ω nominal) to deliver 6×IREF (≈13.9mA) per output pair into 50Ω DC-coupled loads. Its dual-supply architecture separates PLL core (VDD_A/VSS_A) from output drivers (VDD/VSS) to suppress supply-induced jitter coupling.

It supports two operational modes: PLL mode (100MHz input, low-jitter regeneration) and bypass mode (100–400MHz input pass-through), selected via the 3.3V LVTTL PLL/BYPASS# pin. Output enable is controlled by OE_0/OE_3 pins and configurable via SMBus indexed block writes to Control Register Bytes 1–2.

Key Specifications

Pinout & Package

PI6C20400AHEX is packaged in a 28-pin SSOP (H28), 209-mil wide, RoHS-3 and halogen-free "Green" package with exposed thermal pad not connected internally.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe clock distribution applications.

Compared with IDT8T49N242A and ICS843002AGI, the PI6C20400AHEX uniquely balances PCIe 2.0 compliance, HCSL-native output, SMBus configurability, and dual-supply noise isolation - making it optimal for cost-sensitive, high-density server boards using discrete clock synthesis.

Availability

PI6C20400AHEX is available at Aetrix Electronics and suitable for PCIe 2.0 server motherboards, Intel chipset-based industrial controllers, and communications baseband boards requiring stable component supply and long-term lifecycle support.

Supply support for PI6C20400AHEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-performance timing, power management, and signal integrity solutions for computing and industrial markets.

The PI6C20400A belongs to Diodes' Pericom® clock buffer product line, engineered specifically for PCIe 2.0-compliant clock distribution in Intel-platform server and workstation designs with emphasis on jitter suppression and layout-friendly HCSL interfacing.

FAQ

What is the function of the IREF pin on PI6C20400AHEX?

The IREF pin connects to an external 475Ω 1% resistor to set the reference current (IREF = 2.32mA), which determines the output current of all four HCSL differential pairs (IOUT = 6 × IREF ≈ 13.9mA). This ensures precise amplitude control and consistent slew rate across temperature and voltage variations, critical for maintaining PCIe 2.0 eye diagram integrity.

Can PI6C20400AHEX operate in both PLL and bypass modes simultaneously?

No - the PI6C20400AHEX operates exclusively in one mode at a time, selected by the logic level on the PLL/BYPASS# pin. When low, the internal PLL is enabled for 100MHz input regeneration; when high, the device enters bypass mode for 100–400MHz input pass-through. Mode switching requires stable input conditions and may induce transient glitches if done asynchronously.

How does the OE_INV pin affect output enable behavior?

The OE_INV pin (Pin 25) inverts the logic polarity of OE_0, OE_3, SRC_STOP#, and PWRDWN#. When OE_INV = 0, these pins operate with standard active-high (OE_0/OE_3) or active-low (SRC_STOP#/PWRDWN#) logic. When OE_INV = 1, OE_0/OE_3 become active-low, and SRC_STOP#/PWRDWN# become active-high - enabling compatibility with legacy control logic that uses opposite signal conventions.

Is PI6C20400AHEX compatible with AC-coupled HCSL receivers?

The PI6C20400AHEX is designed for DC-coupled HCSL operation and does not provide internal DC bias. When used with AC-coupled receivers, an external 350mV DC bias network must be added at the receiver side - because the driver's output common-mode voltage is undefined in AC-coupled configurations, risking signal integrity loss or receiver malfunction without proper biasing.