Diodes Incorporated PI6C20400ALEX
- Part No.:
- PI6C20400ALEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Application Specific Clock/Timing
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PI6C20400ALEX.pdf
- Description:
- IC CLOCK BUFFER 1:4 28TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PI6C20400ALEX from Diodes Incorporated is a PCIe® 2.0-compliant 1:4 differential clock driver IC designed as a companion to the PI6C410BS clock synthesizer. It distributes a 0.7V HCSL SRC input across four differential output pairs (OUT0–OUT3) with selectable PLL or bypass mode, <50ps cycle-to-cycle jitter, and <1ps additive RMS phase jitter - deployed in Intel PCIe chipset-based server motherboards and storage controllers.
For engineers reviewing the PI6C20400ALEX datasheet, PI6C20400ALEX pinout, PI6C20400ALEX application, or PI6C20400ALEX equivalent, key selection criteria include differential output skew (<50ps), SMBus-programmable PLL bandwidth, tristate control via OE_0/OE_3/SRC_STOP#/PWRDWN#, and compatibility with 100–400 MHz bypass-mode operation for PCIe Gen2 timing distribution.
Technical Context
The PI6C20400ALEX implements a dual-path architecture: a low-jitter PLL path (100 MHz nominal) and a direct bypass path (100–400 MHz), selected via the 3.3V LVTTL PLL/BYPASS# pin. Its current-mode HCSL outputs are configured using an external 475Ω IREF resistor, delivering 6×IREF (≈13.9 mA) per output pair into 50Ω DC-coupled loads.
It operates as an SMBus slave device (7-bit address 0x6E) supporting indexed block read/write for register-level control of output enable, PLL bandwidth, SRC_STOP# behavior, and power-down sequencing. All outputs enter high-impedance state when SRC_STOP# or PWRDWN# is asserted low, with Tdrive_PwrDwn# <300 µs and output stabilization <1 ms after de-assertion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Count | Four differential pairs (OUT0–OUT3), each with complementary # signal |
| Input Type | HCSL differential SRC/SRC# (300–1000 mVpp, 150–900 mV common-mode) |
| Jitter Performance | <50 ps cycle-to-cycle; <1 ps additive RMS phase jitter (PCIe 2.0 filter) |
| Propagation Delay | ±250 ps (PLL mode); 2.5–6.5 ns (bypass mode) |
| Supply Voltage | VDD = VDD_A = 3.3 V ±5% (separate analog/digital rails) |
| Power Consumption | 100 mA (bypass mode), 130 mA (PLL mode) at 3.465 V |
| Operating Temp | –40°C to +85°C ambient temperature range |
Pinout & Package
PI6C20400ALEX is packaged in a 28-pin TSSOP (L28, 173-mil wide), RoHS- and halogen-free "Green" compliant. Pin functions are validated per Diodes DS43442 Rev 2-2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 2, 3 | SRC / SRC# | Differential HCSL clock input from PI6C410BS; 0.7V swing, 100–400 MHz support |
| 6, 7, 9, 10, 19, 20, 22, 23 | OUT[0:3] / OUT[0:3]# | Current-mode HCSL differential outputs; each pair driven by 6×IREF (≈13.9 mA) |
| 8, 21 | OE_0 / OE_3 | 3.3V LVTTL enables for OUT0/OUT0# and OUT3/OUT3#; active-high, independent control |
| 12 | PLL/BYPASS# | 3.3V LVTTL select: low = fan-out mode, high = PLL mode (100 MHz) |
| 13, 14 | SCLK / SDA | SMBus interface (7-bit address 0x6E); supports indexed block read/write for register config |
| 15 | PWRDWN# | 3.3V LVTTL active-low power-down; forces all outputs to high-Z within 300 µs |
| 16 | SRC_STOP# | 3.3V LVTTL active-low stop control; configurable via SMBus to tristate outputs |
| 25 | OE_INV | Inverts polarity of OE_0, OE_3, SRC_STOP#, and PWRDWN# inputs (0 = normal, 1 = inverted) |
| 26 | IREF | External 475Ω resistor sets output current; defines 2.32 mA reference for 6× scaling |
| 1, 5, 11, 18, 24 | VDD | 3.3V supply for output buffers; decoupling required per pin |
| 4 | VSS | Ground for output buffers |
| 27 | VSS_A | Ground for PLL core |
| 28 | VDD_A | 3.3V supply for PLL core; separate rail minimizes noise coupling |
Key Features
| Feature | Design Value |
|---|---|
| Programmable PLL bandwidth | Selectable high/low bandwidth via PLL_BW# pin to optimize jitter suppression for specific source conditions |
| Per-output enable control | Independent OE_0 and OE_3 pins allow selective activation of OUT0/OUT0# and OUT3/OUT3# without affecting other pairs |
| Low-skew distribution | <50 ps inter-output skew ensures timing alignment across four PCIe lanes in multi-slot systems |
| SMBus-configurable stop behavior | Register Bit 1–2 and 5–6 in Data Byte 2 allow SRC_STOP# to force tristate on individual output pairs |
| DC-coupled HCSL termination | Designed for 50Ω-to-ground termination near driver; eliminates need for AC coupling capacitors and external bias networks |
Applications
| PCIe Gen2 Server Motherboard | Enterprise SSD Controller Board |
|---|---|
Use Scenario: Distributing a single PCIe 2.0 reference clock to four physical x16 slots with independent lane enable/disable. IC Role / Device Role / Timing Role: Low-jitter 1:4 clock fanout buffer with per-lane tristate control and PLL/bypass mode selection. Use Value: Enables simultaneous operation of multiple PCIe endpoints while maintaining <50ps skew and PCIe 2.0 jitter compliance across all lanes. |
Use Scenario: Driving four NVMe SSD controller clocks from one upstream PCIe root complex clock source. IC Role / Device Role / Timing Role: HCSL clock repeater with SMBus-configurable output enable and SRC_STOP#-triggered shutdown. Use Value: Allows dynamic power gating of individual SSD lanes during thermal throttling or link training without disrupting other lanes. |
| Intel Chipset-Based Storage Appliance | Multi-Function PCIe Add-in Card |
Use Scenario: Providing synchronized clocks to SAS/SATA controllers, PCIe switches, and baseboard management controllers (BMC). IC Role / Device Role / Timing Role: Timing distribution hub with separate VDD_A/VDD rails and low-additive-jitter PLL path. Use Value: Isolates PLL noise from I/O buffers, ensuring clean clocking for mixed-signal subsystems sharing the same PCB. |
Use Scenario: Clocking FPGA-based PCIe endpoint logic, onboard DDR memory, and auxiliary peripherals from one source. IC Role / Device Role / Timing Role: Programmable clock driver with tristate capability and SMBus register access for runtime reconfiguration. Use Value: Supports field-upgradable timing configurations without hardware changes-e.g., switching between PLL and bypass modes via firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe clock distribution applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT8T49N242A | Integrated crystal oscillator + 4-output LVDS/LVPECL driver; no HCSL support; higher supply current (160 mA) | Requires external crystal; not drop-in compatible due to different output standard and pinout | Choose when system requires integrated XO and LVDS/LVPECL signaling instead of HCSL. |
| ICS843002AG-01 | 4-output HCSL buffer with fixed bypass mode only; no PLL; no SMBus interface; 32-pin QFN package | Lacks programmability and power-down sequencing; limited to static clock distribution | Choose for cost-sensitive, non-reconfigurable PCIe Gen2 designs where PLL flexibility is unnecessary. |
Compared with IDT8T49N242A and ICS843002AG-01, PI6C20400ALEX uniquely combines HCSL output compatibility, SMBus-configurable tristate control, and dual-path (PLL/bypass) operation in a 28-pin TSSOP - enabling dynamic PCIe lane management and jitter-optimized timing in space-constrained server platforms.
Availability
PI6C20400ALEX is available at Aetrix Electronics and suitable for PCIe Gen2 server motherboard design, enterprise SSD controller development, and Intel chipset-based storage appliance manufacturing requiring stable component supply and long-term lifecycle support.
Supply support for PI6C20400ALEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and timing solutions for computing, industrial, and communications markets.
The PI6C20400ALEX belongs to Diodes' Pericom timing product line, engineered specifically for PCIe 2.0-compliant clock distribution in high-density server and storage platforms where low additive jitter and flexible output control are critical.
FAQ
What is the function of the IREF pin on PI6C20400ALEX?
The IREF pin connects to an external 475Ω 1% resistor to set the reference current (2.32 mA), which scales the output current to 6×IREF (≈13.9 mA) per HCSL output pair. This defines the drive strength into 50Ω DC-coupled loads and directly impacts output voltage swing (0.7V) and edge rate. Incorrect resistor value causes out-of-spec output amplitude and jitter performance.
Can PI6C20400ALEX operate without an external crystal?
Yes - PI6C20400ALEX does not require an external crystal. It is a clock buffer, not a clock generator. It accepts an external differential HCSL clock (SRC/SRC#) and redistributes it either through its internal PLL (100 MHz) or directly in bypass mode (100–400 MHz). Crystal-less operation is inherent to its fanout architecture.
How does the OE_INV pin affect output enable behavior?
The OE_INV pin (Pin 25) inverts the logic polarity of OE_0, OE_3, SRC_STOP#, and PWRDWN#. When OE_INV = 0, these signals operate with standard active-high (OE) or active-low (STOP#/PWRDWN#) behavior. When OE_INV = 1, OE_0/OE_3 become active-low, and STOP#/PWRDWN# become active-high - enabling consistent signal polarity across mixed-control systems.
Is PI6C20400ALEX pin-compatible with PI6C20400AHEX?
Yes - PI6C20400ALEX (TSSOP, L28) and PI6C20400AHEX (SSOP, H28) share identical pin numbering, electrical functionality, and register mapping. The only difference is package mechanicals: L28 is 173-mil wide, H28 is 209-mil wide. PCB layout must accommodate the respective footprint, but schematic design and firmware are fully interchangeable.
PI6C20400ALEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- Yes
- Main Purpose:
- PCI Express (PCIe)
- Input:
- HCSL
- Output:
- HCSL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:4
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 400MHz
- Voltage - Supply:
- 3.135V ~ 3.465V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 28-TSSOP
PI6C20400ALEX FAQ
1.How can I place an order for PI6C20400ALEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI6C20400ALEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI6C20400ALEX reliable?
The price and inventory of PI6C20400ALEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6C20400ALEX is usually 5 days.
3.What payment methods are accepted for PI6C20400ALEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6C20400ALEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI6C20400ALEX?
PI6C20400ALEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI6C20400ALEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI6C20400ALEX?
For technical support, including PI6C20400ALEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6C20400ALEX requirements.
6.How does Aetrix verify that PI6C20400ALEX is sourced from the original manufacturer or authorized distributors?
All PI6C20400ALEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6C20400ALEX meets industry standards.
7.What is the process for return or replacement of PI6C20400ALEX?
All PI6C20400ALEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6C20400ALEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI6C20400ALEX part is unused and in its original packaging.
Return procedure for PI6C20400ALEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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