Diodes Incorporated PI6C20400BHE

Overview

PI6C20400BHE from Diodes Incorporated is a PCIe 3.0-compliant 1:4 differential clock buffer with PLL/bypass mode selection, <50 ps cycle-to-cycle jitter, <1 ps additive RMS phase jitter, and 4 differential output pairs (OUT0–OUT3). It serves as a companion to PCIe 3.0 clock generators in server motherboard clock trees.

For engineers reviewing the PI6C20400BHE datasheet, PI6C20400BHE pinout, PI6C20400BHE application, or PI6C20400BHE equivalent, key selection criteria include PCIe Gen3 additive jitter compliance, SMBus-programmable PLL bandwidth, tristate control via SRC_STOP# and PWRDWN#, and 3.3V operation with current-mode differential outputs.

Technical Context

The device implements a dual-mode architecture: PLL mode operates at 100 MHz for low-jitter distribution, while bypass mode supports 100–400 MHz input frequencies without frequency translation. Its phase jitter filter meets PCIe 3.0 specification requirements for additive jitter (<1 ps RMS).

Output enable is per-pair (OE_0/OE_3) and globally controllable via SMBus register writes; tristate behavior is triggered by active-low SRC_STOP# or PWRDWN#, with strict I/O isolation requirements on SCLK/SDA during power-down.

Key Specifications

Pinout & Package

PI6C20400BHE is available in Pb-free, RoHS-compliant 28-pin SSOP (H28) package (209-mil width), with 0.025" pitch and standard JEDEC MO-153 footprint.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe 3.0 clock buffer applications.

Compared with IDT 8P34S1208 and ON Semi NB3N551, PI6C20400BHE uniquely combines PCIe 3.0 additive jitter compliance, per-output SMBus control, and dual-mode (PLL/bypass) operation - making it optimal for Gen3 server platforms requiring dynamic power management and timing margin headroom.

Availability

PI6C20400BHE is available at Aetrix Electronics and suitable for PCIe 3.0 server motherboards, Intel chipset reference designs, and high-density rack-mount switches requiring stable component supply and long-term lifecycle support.

Supply support for PI6C20400BHE includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance signal integrity, power management, and timing solutions for computing and communications infrastructure.

The PI6C20400BHE belongs to Diodes' Pericom-branded PCIe timing portfolio, designed specifically to meet the low-additive-jitter, low-skew, and flexible control requirements of Gen3+ server and storage platforms.

FAQ

What is the function of the IREF pin on PI6C20400BHE?

The IREF pin sets the output current for all differential clock drivers via an external 475Ω 1% resistor connected to ground. This establishes a nominal 2.32mA reference current, which scales the output drive strength to 6×IREF (≈13.9mA), ensuring consistent 0.7V common-mode voltage and 100Ω load compatibility without external termination.

Does PI6C20400BHE support hot-plug clock enable/disable?

Yes - PI6C20400BHE supports real-time output enable/disable via dedicated OE_0 and OE_3 pins (active-high LVTTL), as well as global tristate control through SRC_STOP# and PWRDWN#. All enable/disable transitions occur with <50ps inter-pair skew and full signal integrity preservation, meeting PCIe hot-plug timing requirements.

How does the PLL/BYPASS# pin affect timing performance?

When PLL/BYPASS# is low, the device operates in PLL mode at 100 MHz with optimized phase jitter filtering for PCIe Gen3 compliance. When high, it enters bypass mode supporting 100–400 MHz input frequencies with minimal propagation delay (2.5–6.5 ns) but no frequency translation - enabling direct distribution of higher-frequency clocks like CPU QPI references.

Can PI6C20400BHE be used with non-PCIe clock sources?

Yes - while optimized for PCIe 3.0, its bypass mode accepts 100–400 MHz differential inputs and delivers low-skew, low-jitter outputs compatible with other high-speed serial protocols including SAS, SATA Express, and USB 3.0, provided the input jitter profile meets the device's additive jitter budget (<1 ps RMS in bypass mode).