Diodes Incorporated PI6C48535-11CLIEX
- Part No.:
- PI6C48535-11CLIEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Clock Buffers, Drivers
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PI6C48535-11CLIEX.pdf
- Description:
- IC CLK BUFFER 1:4 266MHZ 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,052
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Product details
Overview
PI6C48535-11CLIEX from Diodes Incorporated (acquired Pericom) is a 4-output LVPECL fanout buffer with integrated crystal oscillator circuit, supporting up to 266 MHz output frequency, < 0.03 ps typical additive phase jitter, and dual selectable clock inputs (REF_IN or XTAL_IN). It operates from 2.5 V or 3.3 V supply across –40 °C to +85 °C and is used in high-speed networking switch clock distribution.
For engineers reviewing the PI6C48535-11CLIEX datasheet, PI6C48535-11CLIEX pinout, PI6C48535-11CLIEX application, or PI6C48535-11CLIEX equivalent, key selection criteria include LVPECL output swing (0.6–1.0 Vpp), propagation delay (<1.6 ns), input select logic (IN_SEL), synchronous enable (SYNC_OE), and TSSOP-20 thermal resistance (θJA = 84 °C/W).
Technical Context
This device integrates a fundamental-mode crystal oscillator (12–50 MHz) with a low-skew LVPECL fanout buffer, enabling single-chip clock generation and distribution. Its dual-input multiplexer (REF_IN/XTAL_IN selected via IN_SEL) and synchronous output enable (SYNC_OE) support flexible clock source switching and glitch-free gating.
The buffer delivers four matched differential LVPECL outputs with ≤30 ps inter-output skew, 48–52% duty cycle, and 300–700 ps rise/fall times under 50 Ω termination. Output disable timing (TOD/TOE = 200 ns) ensures clean state transitions during power management sequences.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Count | 4 differential LVPECL outputs (Q0± to Q3±) |
| Max Output Frequency | 266 MHz - supports DDR2/DDR3 memory clocks and SERDES reference timing |
| Additive Phase Jitter | < 0.03 ps RMS - preserves signal integrity in high-speed serial links |
| Propagation Delay | 1.45–1.6 ns - enables tight timing budget control in backplane clock trees |
| Supply Voltage | 2.5 V or 3.3 V - compatible with mixed-voltage system rails |
| Operating Temp | –40 °C to +85 °C - qualified for industrial-grade networking equipment |
| Package | TSSOP-20 - surface-mount footprint with θJA = 84 °C/W for thermal-aware PCB layout |
Pinout & Package
TSSOP-20 package (7.0 mm × 4.4 mm, 0.65 mm pitch), lead-free and RoHS-compliant, with exposed pad not electrically connected. Thermal resistance θJA = 84 °C/W, θJC = 17 °C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 GND | Power Ground | Primary ground reference for all analog/digital sections; requires low-inductance PCB connection |
| 2 SYNC_OE | Synchronous Output Enable | Pullup input; high = outputs active, low = Q+ forced low / Q− forced high (Hi-Z equivalent) |
| 3 IN_SEL | Clock Source Select | Pulldown input; 0 = REF_IN selected, 1 = XTAL_IN selected (crystal oscillator mode) |
| 4 REF_IN | External Reference Input | LVTTL/LVCMOS-compatible clock input; accepts 2.5 V or 3.3 V logic levels |
| 6,7 XTAL_IN/XTAL_OUT | Crystal Oscillator Interface | Differential crystal connection for internal oscillator (12–50 MHz fundamental mode) |
| 10,13,18 VDD | Power Supply | Three independent 2.5 V / 3.3 V supply pins reduce switching noise coupling to outputs |
| 11,12 Q3± | Differential LVPECL Output | Output clock 3; 0.6–1.0 Vpp swing into 50 Ω termination; matched skew with other outputs |
| 14,15 Q2± | Differential LVPECL Output | Output clock 2; identical electrical specs and timing to Q0±–Q3± |
| 16,17 Q1± | Differential LVPECL Output | Output clock 1; supports same load and routing constraints as Q0±–Q3± |
| 19,20 Q0± | Differential LVPECL Output | Output clock 0; primary output channel; same drive strength and jitter performance as others |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Crystal Oscillator | Eliminates external crystal and load capacitors; reduces BOM count and board area by ~3 components |
| Dual Clock Input Selection | Hardware-selectable REF_IN or XTAL_IN via IN_SEL pin enables failover or multi-source clocking without FPGA logic |
| Synchronous Output Enable | SYNC_OE provides glitch-free output disable/enable synchronized to input clock edge, avoiding metastability |
| Ultra-Low Additive Jitter | <0.03 ps RMS ensures minimal BER degradation in 10G+ serial links and high-speed memory interfaces |
| Matched Output Skew | ≤30 ps inter-output skew maintains timing alignment across multiple ASIC/FPGA clock domains |
Applications
| Networking Switches | Telecom Backplanes |
|---|---|
Use Scenario: Distributing synchronized 156.25 MHz reference clocks to multiple line cards and PHYs in Layer 3 Ethernet switches. IC Role / Device Role / Timing Role: Fanout buffer with integrated oscillator providing jitter-clean, low-skew copies of master clock to SERDES and MAC controllers. Use Value: Eliminates need for external crystal and discrete buffer ICs, reducing timing path complexity and improving system-level jitter margin by >2 dB. | Use Scenario: Driving parallel clock domains on high-density telecom backplanes operating at 200+ MHz with strict skew budgets. IC Role / Device Role / Timing Role: Low-delay (<1.6 ns), low-jitter LVPECL fanout hub synchronizing FPGA fabric clocks, transceiver reference clocks, and memory controllers. Use Value: 30 ps max inter-output skew ensures setup/hold compliance across 16+ downstream devices without per-channel deskew calibration. |
| Server Memory Subsystems | Industrial Test Equipment |
Use Scenario: Generating matched DDR3/DDR4 system clocks (e.g., 800–1066 MHz effective) for multi-rank DIMM modules in rack-mounted servers. IC Role / Device Role / Timing Role: Clock distribution IC delivering four phase-aligned LVPECL outputs to memory controller and rank-specific buffers. Use Value: 0.03 ps additive jitter preserves tAC margin under voltage/temp variation, enabling stable operation at rated speed across industrial temperature range. | Use Scenario: Providing precise, low-noise sampling clocks to multi-channel ADCs and DACs in automated test equipment requiring sub-picosecond timing resolution. IC Role / Device Role / Timing Role: Jitter-critical clock source feeding high-speed data converters with 12–16-bit ENOB requirements. Use Value: Ultra-low additive jitter directly translates to improved SNR (>85 dB) and SFDR (>100 dBc) in wideband signal acquisition paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVPECL fanout buffer with oscillator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ICS853S01I-01LFT | 3.3 V only; no integrated oscillator; requires external crystal; 0.05 ps jitter (typ) | Needs external oscillator circuit; higher jitter limits max data rate in 10G+ links | Select when existing design uses discrete crystal and lower cost outweighs integration benefit |
| Si53301-A-GM | Programmable Any-Frequency output (I²C); 0.02 ps jitter; 2.5 V/3.3 V; QFN-24 | Software-configurable frequency vs fixed 266 MHz; larger package; higher BOM cost | Select when dynamic clock reconfiguration or multi-rate support is required in final system |
Compared with ICS853S01I-01LFT and Si53301-A-GM, the PI6C48535-11CLIEX offers optimal balance of integration (on-die oscillator), ultra-low jitter (<0.03 ps), and compact TSSOP-20 packaging-ideal for space-constrained, fixed-frequency clock distribution where hardware simplicity and deterministic timing are prioritized.
Availability
PI6C48535-11CLIEX is available at Aetrix Electronics and suitable for networking switches, telecom backplanes, server memory subsystems, and industrial test equipment requiring stable component supply and guaranteed long-term availability.
Supply support for PI6C48535-11CLIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated acquired Pericom Semiconductor in 2017 and now manufactures high-performance timing, interface, and signal integrity solutions for communications and computing markets.
The PI6C48535-11CLIEX belongs to Pericom's legacy clock buffer product line, designed specifically for low-jitter, multi-output clock distribution in high-speed digital systems where deterministic timing and board-level integration are critical.
FAQ
What crystal specifications are required for the PI6C48535-11CLIEX internal oscillator?
The device requires a fundamental-mode quartz crystal with 12–50 MHz frequency, ≤50 Ω ESR, 7 pF shunt capacitance, and ≤1 mW drive level. Crystals must be rated for industrial temperature (–40 °C to +85 °C) and mounted close to XTAL_IN/XTAL_OUT pins with symmetric trace routing to minimize parasitic imbalance.
Can PI6C48535-11CLIEX operate with only REF_IN and disable the internal oscillator?
Yes. Setting IN_SEL = 0 selects REF_IN as the clock source and disables the internal oscillator circuit. XTAL_IN and XTAL_OUT become high-impedance; no crystal is needed. The buffer passes REF_IN directly to all four LVPECL outputs with <1.6 ns propagation delay and <0.03 ps additive jitter.
How does SYNC_OE affect output states during enable/disable transitions?
When SYNC_OE transitions low, all Q+ outputs are driven low and all Q− outputs are driven high-producing defined logic states rather than floating outputs. When SYNC_OE transitions high, outputs resume normal LVPECL operation synchronized to the next rising edge of the selected input clock, preventing glitches.
Is PI6C48535-11CLIEX pin-compatible with earlier Pericom fanout buffers like PI6C48535-11C?
Yes. PI6C48535-11CLIEX is a tape-and-reel variant of the same silicon die as PI6C48535-11C, sharing identical pinout, electrical characteristics, and thermal behavior. The "X" suffix denotes packaging only; no functional or parametric differences exist between the two orderables.
PI6C48535-11CLIEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Fanout Buffer (Distribution)
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:4
- Differential - Input:Output:
- No/Yes
- Input:
- LVCMOS, LVTTL, Crystal
- Output:
- LVPECL
- Frequency - Max:
- 266 MHz
- Voltage - Supply:
- 2.375V ~ 2.625V, 3.135V ~ 3.465V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-TSSOP
PI6C48535-11CLIEX FAQ
1.How can I place an order for PI6C48535-11CLIEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI6C48535-11CLIEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI6C48535-11CLIEX reliable?
The price and inventory of PI6C48535-11CLIEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6C48535-11CLIEX is usually 5 days.
3.What payment methods are accepted for PI6C48535-11CLIEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6C48535-11CLIEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI6C48535-11CLIEX?
PI6C48535-11CLIEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI6C48535-11CLIEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI6C48535-11CLIEX?
For technical support, including PI6C48535-11CLIEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6C48535-11CLIEX requirements.
6.How does Aetrix verify that PI6C48535-11CLIEX is sourced from the original manufacturer or authorized distributors?
All PI6C48535-11CLIEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6C48535-11CLIEX meets industry standards.
7.What is the process for return or replacement of PI6C48535-11CLIEX?
All PI6C48535-11CLIEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6C48535-11CLIEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI6C48535-11CLIEX part is unused and in its original packaging.
Return procedure for PI6C48535-11CLIEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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