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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Diodes Incorporated PI6C557-03LEX

Name: PI6C557-03LEX
Brand: Diodes Incorporated
SKU: PI6C557-03LEX
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: PI6C557-03LEX

Manufacturer:: Diodes Incorporated

Category:: Application Specific Clock/Timing

Package:: 16-TSSOP (0.173", 4.40mm Width)

Datasheet:: PI6C557-03LEX.pdf

Description:: IC CLOCK GENERATOR TSSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

PI6C557-03LEX from Diodes Incorporated is a spread spectrum clock generator IC designed for PCI Express and Ethernet timing systems. It accepts a 25 MHz crystal or single-ended clock input, generates two HCSL differential output pairs at 25/100/125/200 MHz, supports ±0.25%, −0.5%, −0.75%, or no spread, operates from 3.3 V ±10%, and delivers 60 ps typical cycle-to-cycle jitter - deployed in PC motherboards and embedded computing platforms to reduce EMI.

For engineers reviewing the PI6C557-03LEX datasheet, PI6C557-03LEX pinout, PI6C557-03LEX application, or PI6C557-03LEX equivalent, key selection considerations include HCSL/LVDS compatibility, spread-spectrum modulation control via SS0/SS1 pins, output frequency selection via S0/S1, OE-driven tri-state capability, and industrial temperature operation (−40°C to +85°C).

Technical Context

The PI6C557-03LEX implements a proprietary Phase-Locked Loop architecture that locks to a 25 MHz fundamental-mode crystal input and synthesizes four selectable output frequencies (25/100/125/200 MHz) with precise duty cycle control (45–55%). Its dual HCSL outputs are current-mode differential drivers (0.7 V swing, 6×IREF), requiring external 475 Ω reference resistor and series termination per PCIe layout guidelines.

Spread spectrum modulation is digitally controlled via two SS pins, enabling center-spread (±0.25%), down-spread (−0.5% or −0.75%), or zero-spread modes at 30–33 kHz modulation frequency. Output enable (OE) provides synchronous tri-state control with <0.1 μs enable/disable latency, and all inputs feature internal pull-up resistors for robust logic-level interpretation.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Frequency	25 MHz fixed crystal or clock input - defines PLL reference; requires ≤300 ppm tolerance crystal.
Output Frequencies	25 / 100 / 125 / 200 MHz - selected by S0/S1 pins; enables PCIe Gen1–Gen3 and Ethernet clocking.
Output Type	HCSL differential (0.7 V current mode) - compatible with PCIe Gen1–Gen3 AC-coupled receivers; supports LVDS with layout adaptation.
Jitter (Cycle-to-Cycle)	60 ps typical - meets PCIe Gen3 jitter budget for reliable high-speed serial link timing margin.
Supply Voltage	3.3 V ±10% (3.0–3.6 V) - single-rail operation; requires local 0.01 µF decoupling per VDD pin.
Operating Temperature	−40°C to +85°C - qualified for industrial-grade embedded and server motherboard environments.
Spread Spectrum	±0.25%, −0.5%, −0.75%, or none - reduces peak EMI by spreading energy across narrowband spectrum.

Pinout & Package

Package: 16-pin TSSOP (173 mil wide, JEDEC MO-153), Pb-free and Green compliant (RoHS 3, halogen/antimony free).

Pin/Terminal	Circuit Role	Design Meaning
1 S0	Frequency select input	LSB of 2-bit output frequency selector (with S1); internal pull-up; sets 25/100/125/200 MHz.
2 S1	Frequency select input	MSB of 2-bit output frequency selector (with S0); internal pull-up; determines PLL multiplication ratio.
3 SS0	Spread select input	LSB of 2-bit spread mode control (with SS1); selects ±0.25%, −0.5%, −0.75%, or no spread.
4 X1/CLK	Crystal/clock input	Primary 25 MHz reference input; accepts parallel-resonant crystal or single-ended CMOS clock signal.
5 X2	Crystal output	Secondary crystal terminal; left unconnected when using external clock source.
6 OE	Output enable input	Active-low tri-state control; drives both CLK0 and CLK1 outputs into high-impedance state when LOW.
7 GNDX	Crystal ground	Dedicated analog ground for crystal circuit; isolated from power ground to minimize noise coupling.
8 SS1	Spread select input	MSB of 2-bit spread mode control (with SS0); configures modulation depth and direction.
9 IREF	Current reference output	Provides precision 2.32 mA reference (with 475 Ω resistor); sets HCSL output current (IOH = 6×IREF).
10 CLK1	HCSL clock output	True-phase HCSL output for channel 1; requires external 33 Ω series resistor and 49.9 Ω termination to ground.
11 CLK1	HCSL complement output	Inverted-phase HCSL output for channel 1; forms differential pair with pin 10 for PCIe clock routing.
12 VDDA	Analog power supply	+3.3 V supply for PLL and analog circuitry; must be decoupled with 0.01 µF capacitor near pin.
13 GNDA	Analog ground	Reference ground for analog and output circuits; separated from digital/power ground for jitter reduction.
14 CLK0	HCSL clock output	True-phase HCSL output for channel 0; routed as 100 Ω differential pair with pin 15 per PCIe layout rules.
15 CLK0	HCSL complement output	Inverted-phase HCSL output for channel 0; completes differential clock pair for low-skew timing distribution.
16 VDDX	Crystal power supply	+3.3 V supply dedicated to crystal oscillator circuit; improves stability and phase noise performance.

Key Features

Feature	Design Value
Dual HCSL differential outputs	Two independent 100 Ω differential clock pairs (CLK0/CLK1) with <50 ps inter-pair skew - meets PCIe Gen3 AC timing requirements.
Programmable spread spectrum	Four discrete spread modes (±0.25%, −0.5%, −0.75%, none) controlled by SS0/SS1 - reduces EMI peaks without altering system timing budget.
Configurable output frequency	Four fixed output rates (25/100/125/200 MHz) selected via S0/S1 - supports legacy PCIe Gen1 and high-speed Gen3 applications in same footprint.
Integrated current reference	IREF pin delivers stable 2.32 mA with 475 Ω resistor - ensures consistent HCSL output amplitude (0.7 V) across voltage/temperature variation.
Fast output enable/disable	Tri-state activation/deactivation in <0.1 µs - enables dynamic clock gating during low-power states without PLL re-lock delay.

Applications

PCI Express Gen3 Root Complex

Ethernet PHY Clocking

Use Scenario: High-speed PCIe Gen3 x16 slot on server motherboard requiring low-jitter, spread-spectrum clocking for EMI compliance.

IC Role / Device Role / Timing Role: Primary clock generator providing two 100 MHz HCSL differential clocks to root complex and switch fabric.

Use Value: 60 ps cycle-to-cycle jitter and ±0.25% center-spread ensure PCIe receiver eye margin while passing FCC Class B radiated emissions.

Use Scenario: 10GBASE-T Ethernet PHY on network interface card needing synchronized 125 MHz clock with reduced spectral peaks.

IC Role / Device Role / Timing Role: Low-noise clock source delivering 125 MHz HCSL differential signal to Ethernet MAC/PHY interface.

Use Value: −0.5% down-spread mode lowers 125 MHz harmonic energy at 250 MHz and 375 MHz, easing front-end filter design.

Embedded Computing Platform

Industrial Control Backplane

Use Scenario: Fanless industrial PC with extended temperature range and strict EMC limits for factory floor deployment.

IC Role / Device Role / Timing Role: System clock generator for CPU chipset and peripheral controllers operating from −40°C to +85°C.

Use Value: Industrial temperature rating and RoHS 3/Green compliance meet CE/UL industrial certification requirements.

Use Scenario: Modular PLC backplane requiring multiple synchronized clocks for real-time I/O modules and FPGA timing domains.

IC Role / Device Role / Timing Role: Dual-output clock distributor generating 25 MHz and 200 MHz clocks for separate timing domains.

Use Value: Simultaneous 25 MHz (for legacy peripherals) and 200 MHz (for high-speed FPGA logic) reduces component count and board space.

Equivalent & Alternatives

The following parts are listed as comparable options for similar spread spectrum clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IDT8T49N242A	LVDS/CMOS outputs only; no native HCSL; higher integration (4 outputs, programmable divider)	Requires external level-shifting for PCIe HCSL; better suited for multi-protocol clock trees	Select if needing >2 outputs or flexible frequency synthesis beyond fixed 25/100/125/200 MHz set
ICS843002AGI	Single 100 MHz output; no spread spectrum; lower jitter (35 ps); 3.3 V only	Lacks spread control and dual-channel capability; optimized for ultra-low-jitter non-EMI-sensitive applications	Select only when EMI reduction is unnecessary and single-frequency precision timing is primary requirement

Compared with IDT8T49N242A and ICS843002AGI, the PI6C557-03LEX uniquely combines native HCSL drive strength, dual-channel spread-spectrum support, and fixed PCIe-aligned frequencies in a cost-optimized 16-pin TSSOP - making it optimal for PCIe Gen1–Gen3 endpoint designs where EMI compliance and footprint efficiency are critical.

Availability

PI6C557-03LEX is available at Aetrix Electronics and suitable for PCIe Gen3 motherboard design, industrial Ethernet hardware development, and embedded computing platform production requiring stable component supply and full RoHS 3/Green compliance.

Supply support for PI6C557-03LEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and timing solutions for industrial, computing, and communications markets.

The PI6C557-03LEX belongs to Diodes' Pericom-branded clock generation product line, engineered specifically for EMI-reduction in high-speed serial interfaces including PCI Express and Ethernet PHY layers.

FAQ

What crystal specifications are required for stable operation?

The PI6C557-03LEX requires a 25 MHz fundamental-mode parallel-resonant crystal with ≤300 ppm frequency tolerance over −40°C to +85°C, 18 pF load capacitance, and low ESR. Recommended part numbers include GC2500003 (49S/SMD, ±30 ppm) and FL2500047 (3.2×2.5 mm, ±20 ppm). External load capacitors must be calculated as (CL − 8) × 2 pF.

How is HCSL output termination implemented on the PCB?

HCSL outputs require a 33 Ω series resistor placed within 0.2 inches of each CLK pin and a 49.9 Ω resistor to ground at the receiver end. The PI6C557-03LEX's open-source driver architecture mandates this configuration to achieve proper 0.7 V differential swing and 100 Ω differential impedance. Layout must follow PCIe microstrip/stripline guidelines with L4 length between 2–16 inches.

Can the device operate in LVDS mode, and what changes are needed?

Yes - the PI6C557-03LEX supports LVDS-compatible voltage levels by configuring external termination: replace the 49.9 Ω ground resistor with a 150 Ω resistor and add 100 Ω parallel resistors (RP/RQ) at the driver side. This shifts common-mode voltage to ~1.15 V and differential swing to ~350 mV, meeting LVDS electrical standards while retaining the same PLL and spread functionality.

What is the function of the IREF pin and how is it used?

The IREF pin delivers a precision 2.32 mA current reference when a 475 Ω resistor is connected to ground. This sets the internal current source for HCSL outputs (IOH = 6 × IREF = 13.9 mA), ensuring consistent 0.7 V differential swing across process/voltage/temperature. No active circuitry connects to IREF - it is strictly an output for external resistor biasing.

PI6C557-03LEX Specifications

Product attributes: Attribute value

Manufacturer:: Diodes Incorporated

Series:: -

Package/Case:: 16-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet, PCI Express (PCIe)

Input:: CMOS, Crystal

Output:: HSTL, LVDS

Number of Circuits:: 1

Ratio - Input:Output:: 1:2

Differential - Input:Output:: No/Yes

Frequency - Max:: 200MHz

Voltage - Supply:: 3V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 16-TSSOP

PI6C557-03LEX FAQ

1.How can I place an order for PI6C557-03LEX through Aetrix?

Please submit a Request for Quotation (RFQ) for PI6C557-03LEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PI6C557-03LEX reliable?

The price and inventory of PI6C557-03LEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6C557-03LEX is usually 5 days.

3.What payment methods are accepted for PI6C557-03LEX?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6C557-03LEX transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PI6C557-03LEX?

PI6C557-03LEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PI6C557-03LEX order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PI6C557-03LEX?

For technical support, including PI6C557-03LEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6C557-03LEX requirements.

6.How does Aetrix verify that PI6C557-03LEX is sourced from the original manufacturer or authorized distributors?

All PI6C557-03LEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6C557-03LEX meets industry standards.

7.What is the process for return or replacement of PI6C557-03LEX?

All PI6C557-03LEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6C557-03LEX, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PI6C557-03LEX part is unused and in its original packaging.

Return procedure for PI6C557-03LEX:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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