Diodes Incorporated PI6CB332000ZDIEX

Overview

PI6CB332000 from Diodes Incorporated is a 20-output PCIe 4.0/5.0/6.0-compliant clock buffer with integrated HCSL termination, designed for high-speed reference clock distribution in server and storage platforms. It accepts a single differential HCSL input (100–200 MHz), delivers 20 low-power differential HCSL outputs with on-chip 85 Ω termination, achieves <16 fs RMS additive phase jitter for PCIe Gen 6, and supports SMBus configuration and per-output enable control via 12 OE# pins.

For engineers reviewing the PI6CB332000 datasheet, PI6CB332000 pinout, PI6CB332000 application, or PI6CB332000 equivalent, key selection criteria include PCIe Gen 6 jitter compliance (<16 fs RMS), 20-channel fanout with integrated termination, 3.3 V supply operation, DB2000Q pinout compatibility, and dual-mode configuration (strapping or SMBus).

Technical Context

The PI6CB332000 implements a zero-delay, non-PLL fanout architecture optimized for PCIe Common Clock and SRIS topologies. Its proprietary output driver delivers tightly matched slew rate (1.5–4 V/ns) and sub-50 ps output-to-output skew while maintaining HCSL voltage compliance (VOH = 225–270 mV, VOL = 0–150 mV) across all 20 channels.

Configuration is supported via strapping pins (SA_0/SA_1) for SMBus address selection and 12 dedicated OE# inputs enabling hardware-based per-pair output gating. Power management includes PWRGD/PWRDN# for global power-down (outputs forced LOW) and SMBus-accessible output enable registers for fine-grained control of all 20 outputs.

Key Specifications

Pinout & Package

PI6CB332000 is housed in a 72-lead, 10 mm × 10 mm TQFN package with exposed thermal pad (EPAD). The package supports high-density routing and efficient thermal dissipation in server motherboard applications.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe clock buffer applications.

Compared with IDT8T49N242 and Si53320-D-GM, PI6CB332000 uniquely combines 20 outputs, DB2000Q pinout, Gen 6 jitter compliance, and dual-mode (strapping + SMBus) configuration-making it optimal for scalable, upgrade-ready server and storage platforms requiring full PCIe Gen 6 readiness and layout efficiency.

Availability

PI6CB332000 is available at Aetrix Electronics and suitable for PCIe Gen 6 server backplanes, enterprise NVMe controller boards, and SAS/SATA expander modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.

Supply support for PI6CB332000 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and timing solutions for computing, communications, and industrial markets.

The PI6CB332000 belongs to Diodes' PCIe-optimized clock buffer product line, engineered specifically for high-density, low-jitter reference clock distribution in next-generation data center infrastructure.

FAQ

What is the minimum input frequency supported by PI6CB332000?

The PI6CB332000 supports an input frequency range of 1–200 MHz, with guaranteed performance from 100 MHz. At frequencies below 100 MHz, output amplitude and jitter may degrade beyond specification; operation below 100 MHz is not recommended for PCIe-compliant applications.

Can PI6CB332000 drive LVDS loads directly?

No-PI6CB332000 outputs are optimized for HCSL (85 Ω differential) and cannot drive standard LVDS (100 Ω) loads without external level-shifting circuitry. For LVDS interfacing, use a dedicated LVDS buffer or add series resistors and termination per Figure 4 in DS41283 Rev 7-2.

How does the RCOMP pin function, and is it mandatory?

RCOMP connects to a 412 Ω resistor to set internal bias current for output drivers. While the device functions without RCOMP (default bias applied), omitting the resistor may cause minor variation in output amplitude and jitter. Diodes recommends populating the 412 Ω resistor for production designs.

Does PI6CB332000 support spread-spectrum clocking (SSC)?

No-PI6CB332000 is a zero-delay fanout buffer without PLL or SSC modulation capability. It preserves input clock spectrum; for systems requiring SSC, the source oscillator must provide spread-spectrum output, and the PI6CB332000 will distribute it transparently with added jitter margin.