Diodes Incorporated PI6CB332001AZXBIEX-13RA

Overview

PI6CB332001AZXBIEX-13RA from Diodes Incorporated is a 20-output, low-power PCIe 4.0/5.0/6.0-compliant clock buffer with integrated 85Ω on-chip HCSL termination, 3.3V supply, and dual-mode output enable control (OE# pins + SMBus + 3-wire side-band interface). It distributes a single differential HCSL reference input (100–400 MHz) to twenty matched low-jitter HCSL outputs for high-speed serial interconnects in server and storage platforms.

For engineers reviewing the PI6CB332001AZXBIEX-13RA datasheet, PI6CB332001AZXBIEX-13RA pinout, PI6CB332001AZXBIEX-13RA application, or PI6CB332001AZXBIEX-13RA equivalent, key selection criteria include PCIe 6.0 additive jitter (<16 fs RMS), differential output-to-output skew (<50 ps), industrial temperature range (–40°C to +85°C), and support for glitch-free output enable via SBEN-controlled side-band interface or SMBus register writes.

Technical Context

The PI6CB332001A implements a fully differential signal path from HCSL input (IN+/IN–) through internal fanout logic to 20 HCSL output pairs (Q0+ to Q19+), each with on-die 85Ω termination to eliminate external resistors. Its control architecture supports three concurrent enable methods: dedicated OE# pins (OE5#–OE12#, OE10#/SHFT_LD#), SMBus-configurable output masks (Byte0–Byte2), and real-time side-band interface (DATA/CLK/SHFT_LD# on OE5#/OE6#/OE10#).

Power sequencing is managed via PWRGD/PWRDN# with <300 µs power-down assertion and <1.8 ms output stabilization. The device uses separate VDDA (3.3 V for analog/input circuitry) and VDDO (3.3 V for outputs), with thermal resistance θJA = 40.83°C/W in its 80-pin 6×6 mm aQFN package - enabling stable operation under sustained 200 mA total supply current at 100 MHz.

Key Specifications

Pinout & Package

PI6CB332001AZXBIEX-13RA is housed in an 80-pin, 6×6 mm dual-row aQFN package (ZXB) with exposed thermal pad (EPAD) connected to GND. Pin pitch is 0.4 mm; package is halogen- and antimony-free per Diodes' "Green" definition.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe clock buffer applications.

Compared with IDT8T49N242A and Si53320-B-GM, the PI6CB332001AZXBIEX-13RA uniquely combines 20 HCSL outputs, PCIe 6.0 jitter performance, on-chip termination, and dual-mode (hardware/software) enable control - making it the only solution meeting full DB2000QL spec for next-gen server and AI infrastructure.

Availability

PI6CB332001AZXBIEX-13RA is available at Aetrix Electronics and suitable for PCIe 6.0 server backplanes, NVMe storage controllers, AI accelerator cards, and multi-protocol storage enclosures requiring stable component supply, long-term lifecycle assurance, and full DB2000QL compliance.

Supply support for PI6CB332001AZXBIEX-13RA includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance timing, power management, and signal integrity solutions for computing, industrial, and communications markets.

The PI6CB332001A belongs to Diodes' PCIe-optimized clock buffer product line, designed specifically to meet Intel DB2000QL specification requirements for ultra-low jitter, on-chip termination, and flexible output enable control in high-density server and storage platforms.

FAQ

What is the function of the SBEN pin on the PI6CB332001AZXBIEX-13RA?

The SBEN pin selects between two mutually exclusive output enable control modes: when low, traditional OE# pins and SMBus registers control outputs; when high, OE5#, OE6#, and OE10# become DATA, CLK, and SHFT_LD# for the 3-wire side-band interface. SBEN has an internal pull-down resistor, so tying it to VDD enables SBI operation by default.

Does the PI6CB332001AZXBIEX-13RA require external termination resistors for HCSL outputs?

No. The device integrates 85Ω on-chip termination for all 20 HCSL output pairs (Q0+ to Q19+), eliminating the need for 80 external 85Ω resistors. This reduces PCB area, BOM cost, and layout sensitivity to trace impedance variations - confirmed in the DS43293 Rev 5-2 datasheet Section 1 and Table "Features".

How does the PI6CB332001AZXBIEX-13RA achieve PCIe 6.0 jitter compliance?

It achieves <16 fs RMS differential additive phase jitter (PCIe 6.0 spec) through proprietary low-noise analog design, matched differential paths, and optimized output driver architecture - verified in production characterization per DS43293 Rev 5-2 Table "HCSL Output Characteristics". This value is measured at 100 MHz input under industrial temperature conditions.

Can the PI6CB332001AZXBIEX-13RA operate with a single 3.3V supply, or are separate VDDA and VDDO rails mandatory?

Separate VDDA (input/analog) and VDDO (output) 3.3V supplies are mandatory. The datasheet specifies independent 3.135–3.465 V rails for each, with distinct current ratings (IDD includes both). Using a single rail violates absolute maximum ratings and risks degraded jitter performance or latch-up due to noise coupling from output switching into input circuitry.