Diodes Incorporated PI6CB33201ZDIEX
- Part No.:
- PI6CB33201ZDIEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Clock Buffers, Drivers
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
PI6CB33201ZDIEX.pdf
- Description:
- IC CLK BUF 1:2 133.33MHZ 24TQFN
- Quantity:
- Payment:

- Shipping:

Inventory:14,542
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Product details
Overview
PI6CB33201ZDIEX from Diodes Incorporated is a two-output, very-low-power PCIe clock buffer with integrated PLL, HCSL input (100 MHz default), dual differential low-power HCSL outputs with on-chip 100 Ω termination, <50 ps output-to-output skew, and PCIe Gen1–Gen5 CC compliance. It supports spread-spectrum tolerance and individual output enable for power-managed server and storage applications.
For engineers reviewing the PI6CB33201ZDIEX datasheet, PI6CB33201ZDIEX pinout, PI6CB33201ZDIEX application, or PI6CB33201ZDIEX equivalent, this device delivers verified cycle-to-cycle jitter <50 ps, SMBus-configurable slew rate/amplitude, tri-level strapping for address/bandwidth selection, and industrial-grade operation from –40°C to +85°C.
Technical Context
The PI6CB33201ZDIEX implements a proprietary low-jitter PLL architecture with selectable loop bandwidth (low/high) and PLL-bypass mode, enabling precise timing control across PCIe Gen1–Gen5 and non-PCIe frequencies (50/125/133.33 MHz). Its dual-output HCSL drivers feature independent OE# pins and programmable amplitude (0.6–0.85 V) and slew rate (2.2–4.0 V/ns).
Configuration is supported via SMBus (block-read/write, 7-bit slave address latched on SADR_TRI) or hardware strapping (BW_SEL_TRI, SADR_TRI), with internal pullup/pulldown resistors (120 kΩ) ensuring deterministic startup. Power-down mode (PD#) reduces analog current to 0.5 mA while maintaining SMBus accessibility.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 3.3 V nominal (3.135–3.465 V); powers analog/digital/output domains separately for noise isolation. |
| Input Frequency Support | 100 MHz (PCIe default), plus 50/125/133.33 MHz via SMBus; all compliant with PCIe SS modulation (30–33 kHz). |
| Differential Jitter (RMS) | 0.07–0.4 ps (PCIe Gen5–Gen2); meets PCIe Gen1–Gen5 integrated phase jitter spec limits. |
| Output Skew | <50 ps max between Q0 and Q1; enables tight timing alignment in multi-lane PCIe root complexes. |
| On-Chip Termination | 100 Ω differential per output; eliminates eight external 50 Ω resistors and simplifies PCB layout. |
| Power Consumption | 44 mA total supply current @ 100 MHz (VDDO+VDD_R+VDDA+VDD_DIG); 2 mA in power-down mode. |
| SMBus Interface | Up to 500 kHz; supports block read/write, 7-bit address, and configuration of frequency, amplitude, slew rate, and PLL mode. |
Pinout & Package
PI6CB33201ZDIEX is housed in a 24-lead, 4 mm × 4 mm TQFN package with exposed pad (EPAD) requiring connection to ground. Pin functions are validated per Diodes DS41833 Rev 7-2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN+, IN− | Differential HCSL clock input | Accepts 100 MHz PCIe reference; supports 50/125/133.33 MHz via SMBus configuration. |
| Q0+, Q0−, Q1+, Q1− | Differential HCSL clock outputs | Each pair provides low-power, terminated 100 Ω outputs with independent enable (OE0#, OE1#). |
| OE0#, OE1# | Active-low CMOS output enable | Internal pulldown; enables per-output power gating without SMBus interaction. |
| PD# | Power-down control | Active-low; enters low-current state (2 mA) while preserving SMBus access and configuration. |
| SCLK, SDATA | SMBus interface | 3.3 V-tolerant; supports full block-read/write protocol for real-time parameter tuning. |
| BW_SEL_TRI, SADR_TRI | Tri-level strapping inputs | Internal pullup + pulldown (120 kΩ each); configure PLL bandwidth and SMBus address at power-up. |
Key Features
| Feature | Design Value |
|---|---|
| PCIe Gen1–Gen5 Clock Buffering | Fully compliant with PCIe CC, SRiS, SRnS, and Gen5 v0.9 jitter specs - no external jitter cleaner required. |
| On-Chip 100 Ω Termination | Eliminates eight discrete 50 Ω resistors per output pair, reducing BOM count and improving signal integrity. |
| Per-Output Enable Control | OE0# and OE1# allow dynamic power management of individual lanes during link training or L1 substates. |
| Programmable Output Amplitude | Four settings (0.6–0.85 V) via SMBus Byte 1; optimizes eye height and EMI for varying trace lengths and loads. |
| Configurable PLL Bandwidth | Selectable low/high bandwidth or bypass mode via BW_SEL_TRI or SMBus; adapts to different CDR lock requirements. |
Applications
| PCIe Root Complex Fanout | Enterprise SSD Controller Timing |
|---|---|
|
Use Scenario: Distributing a single PCIe reference clock to multiple downstream ports in a server motherboard. IC Role / Device Role / Timing Role: Low-jitter clock fanout buffer with on-chip termination and per-port enable control. Use Value: Reduces layout complexity by eliminating eight external terminations and ensures Gen5-compliant jitter (<0.15 ps RMS) across all lanes. |
Use Scenario: Providing synchronized 100 MHz clocks to NVMe controller and flash memory interfaces in high-density SSD modules. IC Role / Device Role / Timing Role: Dual-output PCIe clock buffer with independent OE# pins for staggered power-up sequencing. Use Value: Enables precise lane activation timing and meets PCIe Gen4/Gen5 additive jitter spec (<0.05 ps RMS) under thermal stress. |
| 50/125 MHz Ethernet PHY Clocking | Multi-Protocol SerDes Reference |
|
Use Scenario: Generating 50 MHz or 125 MHz clocks for 1/10 GbE PHYs in telecom line cards using SMBus reconfiguration. IC Role / Device Role / Timing Role: Programmable-frequency clock buffer supporting non-PCIe rates via SMBus-controlled frequency select register. Use Value: Eliminates need for separate oscillators or synthesizers; maintains <50 ps cycle-to-cycle jitter at 125 MHz. |
Use Scenario: Supplying clean, configurable clocks to mixed-interface SoCs (PCIe + SATA + USB 3.x) in embedded edge gateways. IC Role / Device Role / Timing Role: Multi-rate, low-power clock source with SMBus-amplitude/slew tuning for optimal eye opening across protocols. Use Value: Single device replaces three discrete buffers; achieves <11 ps output skew and <0.3 ps additive jitter at 133.33 MHz. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe clock buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT8T49N242A | Quad-output, 3.3 V, supports PCIe Gen4 only; no on-chip termination; requires external 50 Ω resistors per output. | Larger footprint (32-QFN), higher power (65 mA), lacks SMBus slew/amplitude control. | Choose when quad output is needed and board space allows external termination. |
| ICS843002AGI-01LFT | Dual-output, 2.5 V core, supports PCIe Gen3 only; fixed 85 Ω output impedance; no frequency reconfiguration. | Not Gen4/Gen5 compliant; no spread-spectrum tolerance; limited to 100 MHz only. | Choose only for legacy Gen3-only designs where 2.5 V supply is mandated. |
Compared with IDT8T49N242A and ICS843002AGI-01LFT, the PI6CB33201ZDIEX uniquely combines Gen5 compliance, on-chip 100 Ω termination, SMBus-programmable amplitude/slew, and 50/125/133.33 MHz support - delivering lower BOM cost, smaller footprint, and broader protocol coverage in a single 4 mm × 4 mm package.
Availability
PI6CB33201ZDIEX is available at Aetrix Electronics and suitable for PCIe server motherboards, enterprise NVMe SSDs, telecom Ethernet line cards, and multi-protocol edge gateway designs requiring stable component supply, long-term lifecycle support, and RoHS 3/Halogen-free compliance.
Supply support for PI6CB33201ZDIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and ICs, specializing in high-performance timing, power management, and signal integrity solutions for industrial, computing, and communications markets.
The PI6CB33201 belongs to Diodes' PCIe-optimized clock buffer product line, designed specifically to reduce jitter, simplify layout, and extend compatibility across PCIe Gen1 through Gen5 while minimizing external components and power consumption.
FAQ
What is the minimum input clock slew rate supported by PI6CB33201ZDIEX?
The device specifies a minimum differential input slew rate of 0.4 V/ns, measured across a ±75 mV window centered at differential zero. This ensures reliable locking across PCIe Gen1–Gen5 reference clocks and accommodates typical HCSL oscillator outputs without external conditioning.
Can PI6CB33201ZDIEX operate without SMBus configuration?
Yes - it boots into default 100 MHz PCIe mode with high-bandwidth PLL, 0.75 V output amplitude, and fast slew rate. All strapping pins (BW_SEL_TRI, SADR_TRI) have internal pullup/pulldown resistors (120 kΩ), enabling full functionality without SMBus initialization.
How does the on-chip 100 Ω termination affect PCB layout?
The integrated 100 Ω differential termination eliminates the need for eight external 50 Ω resistors (four per output pair), reducing net count, saving ~3.5 mm² board area per output, and removing stub-induced reflections - directly improving signal integrity and easing routing in dense PCIe layouts.
Is PI6CB33201ZDIEX qualified for automotive applications?
No - it is rated for industrial temperature (–40°C to +85°C) and not AEC-Q100 qualified. Diodes offers automotive-grade variants (e.g., PI6CB33201Q) with PPAP capability and IATF 16949 manufacturing; contact Diodes sales for qualified alternatives.
PI6CB33201ZDIEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Fanout Buffer (Distribution)
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:2
- Differential - Input:Output:
- Yes/Yes
- Input:
- CMOS
- Output:
- HCSL
- Frequency - Max:
- 133.33 MHz
- Voltage - Supply:
- 3.135V ~ 3.465V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 24-TQFN (4x4)
PI6CB33201ZDIEX FAQ
1.How can I place an order for PI6CB33201ZDIEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI6CB33201ZDIEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI6CB33201ZDIEX reliable?
The price and inventory of PI6CB33201ZDIEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6CB33201ZDIEX is usually 5 days.
3.What payment methods are accepted for PI6CB33201ZDIEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6CB33201ZDIEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI6CB33201ZDIEX?
PI6CB33201ZDIEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI6CB33201ZDIEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI6CB33201ZDIEX?
For technical support, including PI6CB33201ZDIEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6CB33201ZDIEX requirements.
6.How does Aetrix verify that PI6CB33201ZDIEX is sourced from the original manufacturer or authorized distributors?
All PI6CB33201ZDIEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6CB33201ZDIEX meets industry standards.
7.What is the process for return or replacement of PI6CB33201ZDIEX?
All PI6CB33201ZDIEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6CB33201ZDIEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI6CB33201ZDIEX part is unused and in its original packaging.
Return procedure for PI6CB33201ZDIEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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