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Diodes Incorporated PI6CG33402ZHIEX

Part No.:
PI6CG33402ZHIEX
Manufacturer:
Diodes Incorporated
Category:
Clock Generators, PLLs, Frequency Synthesizers
Package:
32-VFQFN Exposed Pad
Datasheet:
AetrixPI6CG33402ZHIEX.pdf
Description:
IC CLOCK GENERATOR 32TQFN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:8,251

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Product details

Overview

PI6CG33402ZHIEX from Diodes Incorporated is a 3.3V, 4-output PCIe clock generator with on-chip HCSL termination, delivering 100MHz differential outputs compliant with PCIe 1.0–5.0, <50ps cycle-to-cycle jitter, and individual output enable control for server/storage timing applications.

For engineers reviewing the PI6CG33402ZHIEX datasheet, PI6CG33402ZHIEX pinout, PI6CG33402ZHIEX application, or PI6CG33402ZHIEX equivalent, this device supports SMBus programmability, selectable spread-spectrum (-0.25%/-0.5%), per-output slew rate/amplitude tuning, and wake-on-LAN power management in industrial-grade operation.

Technical Context

The PI6CG33402ZHIEX integrates a proprietary low-jitter PLL locked to a 25MHz crystal or CMOS reference, generating four independent 100MHz HCSL outputs with on-chip 85Ω termination-eliminating 16 external resistors. Its analog/digital power domain separation (VDDA/VDD_DIG/VDDO) enables precise noise isolation.

Configuration is supported via strapping pins (SADR, SS_SEL_TRI, PD#) or SMBus (7-bit address 0x68/0x6A), with register-controlled features including per-output enable (B0[3:0]), slew rate (B2[3:0]), amplitude (B1[2:0]), and REFOUT control (B3). Spread-spectrum modulation operates at 31.8kHz triangular profile.

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage 3.3V ±4.5% (3.135–3.465V); powers separate analog (VDDA), digital (VDD_DIG), IO (VDDO), oscillator (VDD_OSC), and REFOUT (VDD_REFOUT) rails.
Input Frequency 25MHz crystal or CMOS reference; supports fundamental-mode XTAL with 8pF load capacitance and ≤50Ω ESR.
Differential Outputs Four HCSL pairs (Q0–Q3); default ZOUT = 85Ω; VOH = 660–850mV, VOL = -150–150mV; tSKEW <50ps.
Jitter Performance PCIe 5.0-compliant: 0.02–0.05ps RMS phase jitter (12kHz–20MHz); differential cycle-to-cycle jitter <50ps.
Spread Spectrum Selectable 0%, -0.25%, or -0.5% down-spread at 31.8kHz; reduces EMI without compromising PCIe timing margins.
Power Management Wake-on-LAN mode draws IDDA_WL = 0.5–1mA; full power-down (PD# = low) reduces total IDD_PD to 1–2mA.
Operating Temperature -40°C to +85°C ambient; qualified for industrial-grade reliability with 125°C max junction temperature.

Pinout & Package

32-lead 5mm × 5mm TQFN package with exposed thermal pad (ePad) connected to GND; RoHS-compliant, halogen-free "Green" construction.

Pin/Terminal Circuit Role Design Meaning
XTAL_IN/CLK (Pin 2) Clock Input Accepts 25MHz crystal or CMOS reference; internal 8pF capacitance and 120kΩ pulldown simplify crystal interface.
Q0+ / Q0− (Pins 13, 14) Differential Output Pair HCSL true/complementary 100MHz output; individually enabled via OE0# (Pin 12); on-chip 85Ω termination saves PCB space.
REFOUT (Pin 6/SADR) CMOS Reference Output Configurable as LVCMOS REFOUT (when SADR = high) or SMBus address select; 0.16–1.5ps RMS phase jitter depending on SSC state.
OE0#–OE3# (Pins 12, 17, 24, 29) Output Enable Control Active-low CMOS inputs with internal pulldowns; override SMBus B0 register to force output disable/enable during runtime.
PD# (Pin 31) Power-Down Control Active-low input with internal pullup; first high assertion initiates startup; low enters ultra-low-power mode (IDD_PD = 1–2mA).
SS_SEL_TRI (Pin 32) Spread-Spectrum Select Tri-level latched input: '0' = no spread, 'M' = -0.25%, '1' = -0.5%; sets initial SSC mode before SMBus reconfiguration.

Key Features

Feature Design Value
On-chip HCSL termination 85Ω per differential pair eliminates 16 external 0402 resistors, reducing layout complexity and signal integrity risk.
Per-output programmability Slew rate (4 settings) and amplitude (4 levels) configurable independently via SMBus B1/B2 registers for board-specific optimization.
Differential output blocking Outputs remain disabled until PLL lock detection ensures stable 100MHz clocks before enabling downstream SerDes receivers.
Wake-on-LAN support Low-power REFOUT remains active (IDDA_WL = 0.5–1mA) while differential outputs are off, enabling remote system wake-up.
Strap-and-SMBus dual configuration Hardware pin strapping (SADR, SS_SEL_TRI, PD#) provides boot-time defaults; SMBus allows dynamic runtime reconfiguration.

Applications

Enterprise SSD Controllers AI Accelerator Boards

Use Scenario: High-bandwidth NVMe SSDs requiring four synchronized 100MHz PCIe Gen4/Gen5 reference clocks for controller, DRAM buffer, and flash channel interfaces.

IC Role / Device Role / Timing Role: Primary PCIe clock generator providing low-jitter, on-die terminated HCSL clocks to multiple SerDes PHYs and memory controllers.

Use Value: Eliminates external termination networks and reduces inter-pair skew to <50ps-critical for maintaining PCIe 5.0 eye margin across dense PCB layouts.

Use Scenario: Multi-GPU AI training servers using PCIe Gen5 x16 slots, where timing synchronization between host CPU, GPU accelerators, and high-speed interconnects is essential.

IC Role / Device Role / Timing Role: Central clock source distributing phase-aligned 100MHz references to GPU PCIe root complexes and CXL memory expansion controllers.

Use Value: Integrated spread-spectrum (-0.25%) lowers EMI emissions without violating PCIe 5.0 phase jitter limits (≤0.15ps RMS), easing EMC certification.

5G Baseband Units Industrial Edge Servers

Use Scenario: Open RAN distributed units (O-RU) with FPGA-based baseband processing needing deterministic clocking for JESD204B/C ADC/DAC links and PCIe backhaul.

IC Role / Device Role / Timing Role: Low-power clock generator supplying HCSL clocks to FPGA transceivers and REFOUT to RF front-end timing circuits.

Use Value: 0.5–1mA wake-on-LAN current enables always-on timing for remote firmware updates while minimizing standby power in fanless enclosures.

Use Scenario: ruggedized edge servers deployed in factory automation, requiring long-term supply stability and operation from -40°C to +85°C.

IC Role / Device Role / Timing Role: Industrial-grade PCIe clock generator supporting multi-slot expansion for vision I/O, motion control, and real-time Ethernet interfaces.

Use Value: Separate VDDA/VDD_DIG power domains suppress digital switching noise from corrupting analog PLL performance-ensuring consistent sub-50ps jitter across temperature.

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe clock generator applications.

Alternative Part Technical Difference Application Difference Selection Advice
ICS8430I-01T 3-output, no on-chip termination; requires external 85Ω resistors; higher typical IDD = 35mA vs. PI6CG33402's 25mA. Lacks wake-on-LAN mode and per-output slew control; suitable only for simpler 3-output designs without EMI-sensitive layouts. Choose when cost sensitivity outweighs layout simplification and power savings-especially in non-PCIe 5.0 systems.
Si5332A-D06844-GM Programmable 8-output clock generator; supports fractional synthesis; higher integration but larger 40-QFN package and $12.50+ unit cost. Over-engineered for fixed 100MHz PCIe gen requirements; adds unnecessary frequency flexibility and software complexity. Prefer only if future-proofing for mixed-frequency SoC interfaces (e.g., USB, SATA, DDR) justifies added cost and design overhead.

Compared with ICS8430I-01T, PI6CG33402ZHIEX saves 16 resistors and cuts power by ~30%; versus Si5332A-D06844-GM, it delivers PCIe-optimized simplicity, lower cost, and smaller footprint-ideal for dedicated 4-output Gen4/Gen5 timing.

Availability

PI6CG33402ZHIEX is available at Aetrix Electronics and suitable for enterprise SSD controllers, AI accelerator boards, 5G baseband units, and industrial edge servers requiring stable component supply across extended product lifecycles.

Supply support for PI6CG33402ZHIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal ICs, with manufacturing certified to IATF 16949 and quality systems aligned to AEC-Q200 standards.

The PI6CG33402 belongs to Diodes' PCIe-optimized clock generator product line, engineered specifically for low-jitter, low-power, and layout-efficient timing in high-speed serial data infrastructure.

FAQ

What is the default output impedance and how is it implemented?

The PI6CG33402ZHIEX defaults to 85Ω differential output impedance per HCSL pair, achieved through integrated on-die termination resistors. This eliminates the need for 16 external 0402 resistors (eight per pair), reducing PCB area, BOM count, and potential stub-induced reflections-verified in Diodes' DS41073 Rev 6-2 characterization.

Can spread-spectrum be enabled after power-up via SMBus?

Yes-spread-spectrum can be reconfigured post-power-up using SMBus registers B1[4:3] (SSENSW1/SSENSW0), but only after hardware latch SS_SEL_TRI has been set to enable software control (B1[5] = 1). The initial SSC mode is fixed by SS_SEL_TRI at power-on; changing SSC state dynamically requires careful sequencing to avoid PLL unlock.

How does wake-on-LAN mode affect power consumption and functionality?

In wake-on-LAN mode (PD# = low, B3[5] = 1), the REFOUT remains active while differential outputs are disabled, drawing only IDDA_WL = 0.5–1mA and IDD_WL = 3–6mA total. This enables remote system wake-up via the buffered CMOS reference without powering full PCIe clock distribution-confirmed in Table 5 of DS41073.

What are the key layout considerations for the 5mm × 5mm TQFN package?

Key layout practices include: connecting the ePad directly to a solid GND plane with ≥4 thermal vias; separating analog (VDDA/GNDA) and digital (VDD_DIG/GND_DIG) ground planes tied at a single point near the IC; routing XTAL_IN/CLK differentially with matched length and 50Ω impedance; and placing 100nF ceramic decoupling capacitors within 2mm of each VDD pin as specified in DS41073 Section 9.2.

PI6CG33402ZHIEX Specifications

Product attributes
Attribute value
Manufacturer:
Diodes Incorporated
Series:
-
Package/Case:
32-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Programmable:
Not Verified
Type:
Clock Generator
PLL:
Yes
Input:
CMOS, Crystal
Output:
HCSL
Number of Circuits:
1
Ratio - Input:Output:
1:4
Differential - Input:Output:
-
Frequency - Max:
100MHz
Divider/Multiplier:
No/No
Voltage - Supply:
3.135V ~ 3.465V
Operating Temperature:
-40°C ~ 85°C (TA)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-
Supplier Device Package:
32-TQFN (5x5)

PI6CG33402ZHIEX FAQ

1.How can I place an order for PI6CG33402ZHIEX through Aetrix?

Please submit a Request for Quotation (RFQ) for PI6CG33402ZHIEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PI6CG33402ZHIEX reliable?

The price and inventory of PI6CG33402ZHIEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6CG33402ZHIEX is usually 5 days.

3.What payment methods are accepted for PI6CG33402ZHIEX?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6CG33402ZHIEX transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PI6CG33402ZHIEX?

PI6CG33402ZHIEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PI6CG33402ZHIEX order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PI6CG33402ZHIEX?

For technical support, including PI6CG33402ZHIEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6CG33402ZHIEX requirements.

6.How does Aetrix verify that PI6CG33402ZHIEX is sourced from the original manufacturer or authorized distributors?

All PI6CG33402ZHIEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6CG33402ZHIEX meets industry standards.

7.What is the process for return or replacement of PI6CG33402ZHIEX?

All PI6CG33402ZHIEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6CG33402ZHIEX, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PI6CG33402ZHIEX part is unused and in its original packaging.

Return procedure for PI6CG33402ZHIEX:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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