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Home > Products > Integrated Circuits (ICs) > Clock/Timing > Application Specific Clock/Timing

Diodes Incorporated PI6LC48C21LIEX

Name: PI6LC48C21LIEX
Brand: Diodes Incorporated
SKU: PI6LC48C21LIEX
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: PI6LC48C21LIEX

Manufacturer:: Diodes Incorporated

Category:: Application Specific Clock/Timing

Package:: 8-TSSOP (0.173", 4.40mm Width)

Datasheet:: PI6LC48C21LIEX.pdf

Description:: 125MHZ CMOS SYNTHESIZER

Quantity:: RFQ Add To RFQ list

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Product details

Overview

PI6LC48C21LIEX from Pericom Semiconductor is a single-output LVCMOS clock generator optimized for Ethernet reference clock generation, using a 25MHz fundamental-mode crystal to synthesize 125MHz (or 130MHz) with 0.15ps typical RMS phase jitter (1.875MHz–20MHz offset), full 3.3V/2.5V supply support, and industrial temperature operation (−40°C to +85°C).

For engineers reviewing the PI6LC48C21LIEX datasheet, PI6LC48C21LIEX pinout, PI6LC48C21LIEX application, or PI6LC48C21LIEX equivalent, key selection criteria include output frequency accuracy, low-jitter performance at 125MHz, OE-controlled tri-state capability, LVCMOS drive strength (15Ω output impedance), and compatibility with 18pF parallel-resonant crystals in 8-TSSOP packaging.

Technical Context

The PI6LC48C21LIEX integrates a PLL-based frequency synthesizer with a 25MHz crystal oscillator interface, supporting fixed integer division (×5) to generate 125MHz or ×5.2 to generate 130MHz. It employs separate analog (VDDA) and core (VDD) power domains to isolate PLL noise from output switching transients.

Its OE input enables hardware-controlled output disable into high-impedance state, while XTAL_IN accepts either crystal or AC-coupled LVCMOS clock input. The device requires external 0.1μF bypass on VDD and 10μF + 10Ω RC filter on VDDA for optimal jitter performance.

Key Specifications

Parameter	Value and Actual Design Meaning
Output Frequency	125 MHz or 130 MHz - fixed integer synthesis from 25 MHz or 26 MHz crystal; no programmability.
RMS Phase Jitter (1.875–20 MHz)	0.15 ps typical - meets stringent Ethernet PHY timing margin requirements for 1000BASE-T and 2.5GBASE-T.
Supply Voltage	3.3 V ±5% or 2.5 V ±5% - dual-voltage operation supports legacy and low-power system designs.
Output Impedance	15 Ω - matched LVCMOS drive enables direct connection to 50 Ω transmission lines with minimal reflection.
Operating Temperature	−40°C to +85°C - qualified for industrial-grade networking equipment deployment.
Crystal Load Capacitance	18 pF - requires parallel-resonant crystal with CL = 18 pF (e.g., FL2500047 or FY2500091).
OE Input Pull-up	51 kΩ internal - eliminates need for external pull-up; logic-high enables CLK output, logic-low disables to Hi-Z.

Pinout & Package

Package: 8-pin TSSOP (L), Pb-free & Green, 173-mil body width, JEDEC MO-153F/AA compliant.

Pin/Terminal	Circuit Role	Design Meaning
1 VDDA	Analog Power Supply	Dedicated 3.3V/2.5V analog rail for PLL and crystal oscillator; requires 10μF + 10Ω RC filter for jitter suppression.
2 OE	Output Enable Input	Active-high control: drives CLK to high-impedance when low; internal 51 kΩ pull-up eliminates external resistor.
3 XTAL_OUT	Crytal Oscillator Output	Drives crystal's parallel-resonant mode; may be left floating if external clock used on XTAL_IN.
4 XTAL_IN	Crytal Oscillator Input / External Clock Input	Accepts 25 MHz crystal or AC-coupled LVCMOS clock; input capacitance 4 pF; edge rate ≥10 ns acceptable.
5 NC	No Connect	Not bonded; must remain unconnected per datasheet.
6 GND	Ground Reference	Common return for digital and analog sections; requires low-inductance PCB connection to minimize ground bounce.
7 CLK	LVCMOS Clock Output	Single-ended 125/130 MHz LVCMOS output; 15 Ω source impedance; 47–53% duty cycle; 250–800 ps rise/fall time.
8 VDD	Digital Core Power Supply	Separate 3.3V/2.5V rail for digital logic; requires 0.1 μF ceramic bypass capacitor near pin.

Key Features

Feature	Design Value
Dual-Supply Isolation	VDD (digital) and VDDA (analog) separation reduces supply-induced jitter by isolating PLL noise from output driver switching.
Crystal Interface Optimization	Characterized for 18 pF parallel-resonant crystals (e.g., FL2500047); supports fundamental-mode 25 MHz or 26 MHz crystals only.
Hardware Output Control	OE pin enables deterministic, glitch-free output disable without software intervention-critical for hot-swap and power sequencing.
Low-Jitter Synthesis	0.15 ps RMS jitter (1.875–20 MHz) ensures compliance with IEEE 802.3bz (2.5GBASE-T) and 1000BASE-T jitter budgets.
Industrial Temperature Range	Guaranteed operation from −40°C to +85°C ambient enables use in uncontrolled environments like outdoor switches and industrial gateways.

Applications

Gigabit Ethernet Switch PHY

Industrial Ethernet Controller

Use Scenario: Reference clock for Marvell 88E6352 or Broadcom BCM54616S Gigabit PHY ICs in managed layer-2 switches.

IC Role / Device Role / Timing Role: Primary 125 MHz LVCMOS clock source synchronized to 25 MHz crystal; provides jitter-clean timing for GMII/RGMII interfaces.

Use Value: 0.15 ps RMS jitter ensures <1 UI total jitter at PHY receiver, meeting IEEE 802.3 Clause 40 margin requirements.

Use Scenario: Clocking engine for TI AM335x or NXP i.MX6-based industrial PLC controllers with integrated Ethernet MAC.

IC Role / Device Role / Timing Role: Single-output clock generator replacing crystal oscillator + buffer; simplifies BOM and layout in space-constrained DIN-rail enclosures.

Use Value: OE-controlled tri-state allows dynamic clock gating during firmware updates, reducing EMI during idle states.

1000BASE-T Media Converter

Network Attached Storage (NAS) SoC

Use Scenario: Reference clock for Realtek RTL8211E or Microchip LAN8720A PHYs in fiber-to-copper media converters deployed in telecom cabinets.

IC Role / Device Role / Timing Role: Low-phase-noise 125 MHz clock generator operating across −40°C to +85°C ambient, directly driving PHY clock input.

Use Value: Dual 3.3V/2.5V supply support enables interoperability with both legacy and modern PHY voltage rails.

Use Scenario: System clock source for ARM-based NAS SoCs (e.g., ASPEED AST2600) requiring precise 125 MHz for PCIe Gen2 root complex and Ethernet MAC timing.

IC Role / Device Role / Timing Role: Fixed-ratio clock synthesizer eliminating need for multiple crystals; replaces discrete oscillator + divider chain.

Use Value: 8-TSSOP package enables compact two-layer PCB layout, reducing cost vs. QFN alternatives in high-volume consumer storage platforms.

Equivalent & Alternatives

The following parts are listed as comparable options for similar single-output LVCMOS clock generator applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
IDT 5P49V5901BGI	Programmable output (I²C-configurable), higher current drive (24 mA), wider frequency range (up to 725 MHz), but higher jitter (0.45 ps typ).	Supports multi-frequency systems (e.g., USB + Ethernet); not pin-compatible; requires configuration EEPROM.	Select when flexibility across multiple clock domains is required; avoid if fixed 125 MHz and lowest jitter are primary goals.
Si5351A-B-GM	3-output, I²C-programmable, CMOS output, 0.8 ps jitter @ 125 MHz, requires external crystal and configuration firmware.	Enables clock tree consolidation; adds MCU dependency and boot-time initialization latency.	Choose for multi-clock systems needing >1 output; not suitable for simple drop-in 125 MHz replacement with zero configuration.

Compared with IDT 5P49V5901BGI and Si5351A-B-GM, the PI6LC48C21LIEX delivers the lowest phase jitter (0.15 ps) and zero-configuration operation ideal for dedicated Ethernet PHY clocking, trading programmability for jitter performance and design simplicity.

Availability

PI6LC48C21LIEX is available at Aetrix Electronics and suitable for Gigabit Ethernet switch PHYs, industrial Ethernet controllers, and 1000BASE-T media converters requiring stable component supply, long-term lifecycle assurance, and Pb-free compliance.

Supply support for PI6LC48C21LIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Pericom Semiconductor (acquired by Diodes Incorporated in 2016) specialized in high-performance timing, signal integrity, and interface solutions for networking, computing, and communications infrastructure.

The PI6LC48C21LIEX belongs to the HiFlex family of low-jitter clock generators, designed specifically to replace discrete crystal oscillators in Ethernet PHY reference clock applications with superior phase noise performance.

FAQ

Can the PI6LC48C21LIEX accept an external LVCMOS clock instead of a crystal?

Yes - the XTAL_IN pin supports AC-coupled LVCMOS clock inputs with edge rates as slow as 10 ns. XTAL_OUT may be left floating in this mode. Amplitude should be reduced to half-swing to prevent rail interference, and termination matching (e.g., 50 Ω) is required at the input.

What is the recommended bypass capacitor configuration for VDDA?

VDDA requires a 10 μF tantalum or ceramic capacitor in series with a 10 Ω resistor, placed close to the pin. This RC filter suppresses high-frequency noise coupling into the PLL analog section, directly improving RMS phase jitter performance.

Does the PI6LC48C21LIEX support spread-spectrum clocking (SSC)?

No - the PI6LC48C21LIEX is a fixed-frequency, non-programmable clock generator with no SSC capability. Its architecture is optimized for ultra-low jitter at 125 MHz or 130 MHz only, making it unsuitable for EMI reduction via frequency modulation.

Is the NC pin (Pin 5) safe to connect to ground or leave floating?

Pin 5 is a true no-connect - not bonded internally. It must remain unconnected (floating) on the PCB. Connecting it to ground, VDD, or any other node violates the datasheet and may cause unpredictable behavior or reliability issues.

PI6LC48C21LIEX Specifications

Product attributes: Attribute value

Manufacturer:: Diodes Incorporated

Series:: HiFlex™

Package/Case:: 8-TSSOP (0.173", 4.40mm Width)

Packaging:: Tape & Reel (TR)

Product Status:: Active

Programmable:: Not Verified

PLL:: Yes

Main Purpose:: Ethernet

Input:: Crystal

Output:: LVCMOS

Number of Circuits:: 1

Ratio - Input:Output:: 1:1

Differential - Input:Output:: No/No

Frequency - Max:: 136MHz

Voltage - Supply:: 2.375V ~ 2.625V, 3.135V ~ 3.465V

Operating Temperature:: -40°C ~ 85°C (TA)

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 8-TSSOP

PI6LC48C21LIEX FAQ

1.How can I place an order for PI6LC48C21LIEX through Aetrix?

Please submit a Request for Quotation (RFQ) for PI6LC48C21LIEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PI6LC48C21LIEX reliable?

The price and inventory of PI6LC48C21LIEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6LC48C21LIEX is usually 5 days.

3.What payment methods are accepted for PI6LC48C21LIEX?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6LC48C21LIEX transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PI6LC48C21LIEX?

PI6LC48C21LIEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PI6LC48C21LIEX order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PI6LC48C21LIEX?

For technical support, including PI6LC48C21LIEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6LC48C21LIEX requirements.

6.How does Aetrix verify that PI6LC48C21LIEX is sourced from the original manufacturer or authorized distributors?

All PI6LC48C21LIEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6LC48C21LIEX meets industry standards.

7.What is the process for return or replacement of PI6LC48C21LIEX?

All PI6LC48C21LIEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6LC48C21LIEX, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PI6LC48C21LIEX part is unused and in its original packaging.

Return procedure for PI6LC48C21LIEX:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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