Diodes Incorporated PI6LC48H02QLIEX

Overview

PI6LC48H02QLIEX from Diodes Incorporated is an automotive-grade PCIe 3.0/2.0/1.0 clock generator with two HCSL differential outputs, a 25 MHz crystal input, 3.3 V supply, and RMS phase jitter of 0.32 ps at 100 MHz. It delivers selectable output frequencies (25/100/125/200 MHz) via S0/S1 control pins and operates across –40°C to +85°C.

For engineers reviewing the PI6LC48H02QLIEX datasheet, PI6LC48H02QLIEX pinout, PI6LC48H02QLIEX application, or PI6LC48H02QLIEX equivalent, key selection criteria include PCIe 3.0 phase jitter compliance (0.45 ps RMS high-frequency), dual HCSL/LVDS output flexibility, automotive Grade 3 qualification, and TSSOP-16 package compatibility with standard PCB layout guidelines.

Technical Context

The PI6LC48H02QLIEX integrates a proprietary Phase-Locked Loop (PLL) that synthesizes four precise output frequencies from a single 25 MHz crystal or clock input. Its architecture supports dynamic frequency selection via two digital control inputs (S0/S1), enabling configuration without reprogramming.

It features separate analog (VDDA/GNDA) and digital (VDDX/GND) power domains, dedicated IREF pin for precision current reference calibration, and OE-controlled tri-state outputs compliant with PCIe layout requirements including series termination (33 Ω) and ground termination (49.9 Ω).

Key Specifications

Pinout & Package

Package: 16-pin TSSOP (173 mil wide), Pb-free and RoHS-compliant (L16 code). Pin spacing: 0.65 mm pitch; body dimensions: 5.0 × 4.4 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with Si5332A-D-GM and ICS8430M-01T, the PI6LC48H02QLIEX offers optimal balance of PCIe 3.0 compliance, automotive qualification, fixed-frequency simplicity, and TSSOP-16 footprint - making it ideal for cost- and space-constrained automotive PCIe clocking where configurability is unnecessary.

Availability

PI6LC48H02QLIEX is available at Aetrix Electronics and suitable for automotive ADAS systems, PCIe-based infotainment platforms, and telematics control units requiring stable component supply with AEC-Q100 Grade 3 assurance and long-term production continuity.

Supply support for PI6LC48H02QLIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and timing solutions for automotive, industrial, and computing markets.

The PI6LC48H02QLIEX belongs to Diodes' Pericom-branded timing portfolio, designed specifically for automotive PCIe clock distribution with emphasis on jitter performance, thermal robustness, and layout-friendly HCSL/LVDS dual-mode outputs.

FAQ

What crystal specifications are mandatory for stable operation?

The PI6LC48H02QLIEX requires a 25 MHz fundamental-mode parallel-resonant crystal with load capacitance of 20 pF, frequency tolerance ≤±15 ppm, and stability ≤±20 ppm over –40°C to +85°C. Recommended part: FL2500184Q (Pericom). Crystal capacitors must be configured as (CL − 8) × 2 = 16 pF effective external capacitance.

How is HCSL output current calibrated using the IREF pin?

A 475 Ω resistor connected between IREF and GND sets a 2.32 mA reference current. The HCSL output current (IOH) is internally scaled to 6×IREF = 13.9 mA, ensuring proper 0.8 V differential swing into 50 Ω loads. Deviation from 475 Ω directly impacts output amplitude and common-mode voltage.

Can the PI6LC48H02QLIEX drive LVDS receivers without level-shifting components?

Yes - by configuring external resistors RP = RQ = 100 Ω and RT = 150 Ω per the LVDS Layout Guidelines, the device delivers LVDS-compatible voltage levels (≈350 mV differential) while maintaining signal integrity. No active level shifters are needed, but routing must follow 100 Ω differential impedance rules.

What is the maximum allowable trace length for PCIe-compliant HCSL routing?

For HCSL outputs, L4 (coupled differential segment) must be 2–16 inches for microstrip or 1.8–14.4 inches for stripline on the same PCB. When routing to a PCIe connector, L4 is reduced to 0.25–14 inches (microstrip) or 0.225–12.6 inches (stripline). L1–L3 non-coupled segments are capped at 0.5", 0.2", and 0.2" respectively to limit stub-induced reflections.