Diodes Incorporated PI6LC48H04LIEX

Overview

PI6LC48H04LIEX from Diodes Incorporated is a PCIe 4.0/3.0/2.0/1.0 and Ethernet-compliant clock generator with four low-power HCSL differential outputs, operating from a 25MHz crystal input. It delivers precise output frequencies of 100MHz, 125MHz, 156.25MHz, 133.33MHz, and 200MHz, supports dual supply voltages (3.3V or 2.5V), and achieves 0.45ps RMS phase jitter for PCIe Gen 4 compliance in networking and embedded server timing applications.

For engineers reviewing the PI6LC48H04LIEX datasheet, PI6LC48H04LIEX pinout, PI6LC48H04LIEX application, or PI6LC48H04LIEX equivalent, key selection criteria include PCIe 4.0 jitter performance (≤0.45ps RMS), quad HCSL output configuration, S[1:0]-based frequency selection, VSWING_CTRL voltage-swing control, and industrial temperature operation (–40°C to +85°C).

Technical Context

The device implements a proprietary Phase-Locked Loop architecture optimized for PCIe 4.0 jitter requirements, with configurable PLL bandwidth (2–5MHz) and CDR reference at 10MHz. It accepts only a 25MHz fundamental-mode crystal or single-ended clock input and generates four independent differential clock pairs without internal fanout buffers or spread-spectrum capability.

All outputs are low-power HCSL (0.7V swing, 50Ω termination), with tri-level VSWING_CTRL enabling 0.63V/0.75V/0.87V amplitude selection. Output enable is hierarchical: OE controls all outputs, while OE0&1 independently enables Q0+/− and Q1+/−, supporting dynamic power gating per output pair.

Key Specifications

Pinout & Package

Package: 20-pin TSSOP (173mil wide, L20), RoHS-3 and halogen/antimony-free "Green" construction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar clock generator applications.

Compared with IDT8T49N242A and Si5332A-D-GM, the PI6LC48H04LIEX offers optimal balance of PCIe 4.0 compliance, quad HCSL simplicity, industrial temperature support, and cost efficiency-without requiring configuration firmware or external loop components.

Availability

PI6LC48H04LIEX is available at Aetrix Electronics and suitable for PCIe 4.0 server backplanes, Ethernet switch timing subsystems, and industrial embedded controllers requiring stable component supply, long-term lifecycle assurance, and RoHS-3/halogen-free compliance.

Supply support for PI6LC48H04LIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance analog, logic, and timing solutions for industrial, computing, and communications markets.

The PI6LC48H04LIEX belongs to Diodes' Pericom-branded clock generation portfolio, designed specifically for PCIe and Ethernet infrastructure applications where low jitter, differential signaling, and industrial reliability are critical.

FAQ

What crystal specifications are required for stable operation?

The PI6LC48H04LIEX requires a 25MHz fundamental-mode parallel-resonant crystal with ±30ppm stability over –40°C to +85°C and 18pF load capacitance. Recommended part numbers include GC2500003 (49S/SMD, ±30ppm) and FL2500038 (3.2×2.5mm SMD, ±20ppm). External load capacitors (C1/C2 ≈ 27pF each) must be used for CL=18pF crystals.

Can the device operate with a 2.5V supply only, or must both 2.5V and 3.3V rails be present?

The PI6LC48H04LIEX supports either 3.3V ±5% or 2.5V ±5% for VDDOA (analog/output supply), but VDDX (crystal supply) must match the selected VDDOA voltage. Both rails are not required simultaneously - the device operates fully on a single supply: either 3.3V on all VDD pins or 2.5V on all VDD pins. Mixing voltages invalidates AC specifications.

How does the VSWING_CTRL pin affect HCSL output compatibility with downstream receivers?

VSWING_CTRL sets the HCSL output amplitude to 0.63V (logic low), 0.75V (open/default), or 0.87V (logic high), directly matching common receiver input thresholds. This eliminates need for external series resistors or level-shifting networks when interfacing with Intel, AMD, or Broadcom SerDes that specify 0.7V ±10% or 0.8V nominal HCSL input sensitivity.

Is the PI6LC48H04LIEX pin-compatible with earlier Pericom clock generators like the PI6C48H04?

No - the PI6LC48H04LIEX is not pin-compatible with the legacy PI6C48H04. While both are 20-pin TSSOP clock generators, the PI6LC48H04LIEX relocates XTAL_OUT (Pin 6) and adds dedicated VSWING_CTRL (Pin 10), altering pin assignments. Board redesign is required for migration; refer to DS42507 Rev 1-2 for full pin mapping verification.