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Diodes Incorporated PI6LC48P25104LIEX
- Part No.:
- PI6LC48P25104LIEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Application Specific Clock/Timing
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
PI6LC48P25104LIEX.pdf
- Description:
- 156.25MHZ LVPECL SYNTHESIZER
- Quantity:
- Payment:
- Shipping:
Inventory:3,190
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Product details
Overview
PI6LC48P25104LIEX from Pericom is a single-output LVPECL clock synthesizer optimized for Ethernet reference clock generation, using a 25MHz crystal to produce 156.25MHz or 187.5MHz outputs with RMS phase jitter of 0.3ps (typical) at 156.25MHz (12kHz–20MHz), full 3.3V/2.5V supply support, and operation across –40°C to +85°C industrial temperature range.
For engineers reviewing the PI6LC48P25104LIEX datasheet, PI6LC48P25104LIEX pinout, PI6LC48P25104LIEX application, or PI6LC48P25104LIEX equivalent, key selection criteria include LVPECL output compliance, Freq_SEL-controlled multiplication ratio (×6.25/×7.5), ultra-low jitter performance, dual-supply voltage flexibility, and TSSOP-8 packaging compatibility with SATA/SAS and 10/100/1000BASE-T Ethernet timing systems.
Technical Context
The PI6LC48P25104LIEX integrates a proprietary low-phase-noise PLL with a crystal oscillator interface supporting fundamental-mode parallel-resonant crystals (18pF load, 19.33–30MHz range). Its frequency synthesis is controlled by the Freq_SEL pin, selecting integer multiplication factors of ×6.25 or ×7.5 relative to the input crystal frequency.
It features separate analog (VDDA) and core (VDD) power domains with dedicated bypassing requirements (10μF + 10Ω for VDDA; 0.1μF for VDD), enabling isolation of PLL-sensitive analog circuitry from digital switching noise-critical for achieving sub-0.35ps RMS jitter in high-speed serial interfaces.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Type | Single differential LVPECL pair (CLK/CLK#), requiring 150Ω source-to-GND + 100Ω termination across outputs |
| Output Frequency Range | 145–187.5MHz; selectable via Freq_SEL pin (×6.25 or ×7.5 multiplication of crystal input) |
| RMS Phase Jitter | 0.3ps typical @ 156.25MHz (12kHz–20MHz integration band), meeting IEEE 802.3an (10GBASE-T) jitter limits |
| Supply Voltage | Supports dual-mode operation: 3.3V (3.135–3.465V) or 2.5V (2.375–2.625V) for both VDD and VDDA rails |
| Operating Temperature | –40°C to +85°C industrial grade, validated per JEDEC JESD22-A104 thermal cycling |
| Crystal Interface | Accepts 18pF parallel-resonant fundamental-mode crystals (e.g., FL2500047 or FY2500091) or LVCMOS input via AC coupling |
Pinout & Package
Package: 8-pin Pb-free Green TSSOP (173mil width), JEDEC MO-153F/AA compliant, with exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VDDA | Analog Power Supply | Dedicated 3.3V/2.5V analog rail for PLL/VCO; requires 10μF + 10Ω RC filter to suppress supply-induced jitter |
| 2 GND | Ground Reference | Common return for analog and core domains; must be low-inductance connection to system ground plane |
| 3 XTAL_OUT | Clock Oscillator Output | Drives external crystal in Pierce configuration; left floating when using LVCMOS input mode |
| 4 XTAL_IN | Clock Oscillator Input | Accepts crystal or AC-coupled LVCMOS clock (10ns max edge rate); internal bias sets DC level |
| 5 Freq_SEL | Frequency Selection Control | Logic input: LOW selects ×6.25 multiplication; HIGH selects ×7.5; internal pull-down enabled |
| 6 CLK | Differential Output (+) | LVPECL true output; 20%–80% rise/fall time ≤400ps; 48–52% duty cycle at 156.25MHz |
| 7 CLK# | Differential Output (–) | LVPECL complement output; requires matched 100Ω termination across CLK/CLK# for proper common-mode rejection |
| 8 VDD | Core Power Supply | 3.3V/2.5V digital core rail; bypassed with 0.1μF capacitor near pin to minimize switching noise coupling |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low phase jitter | 0.3ps RMS @ 156.25MHz enables compliance with 10GBASE-T (IEEE 802.3an) and SAS-3 timing budgets |
| Dual supply voltage support | Simultaneous 3.3V and 2.5V operation allows seamless integration into mixed-voltage server/storage platforms |
| Configurable frequency multiplication | Freq_SEL pin provides hardware-selectable ×6.25 / ×7.5 ratios-no I²C or SPI required for basic Ethernet clock generation |
| Separate analog/digital power domains | VDDA/VDD isolation reduces supply-induced jitter by >5dB compared to single-rail clock generators |
| Flexible crystal or LVCMOS input | XTAL_IN accepts either quartz crystal or AC-coupled LVCMOS clock, simplifying board-level clock tree design |
Applications
| 10GBASE-T Ethernet PHY Timing | SAS-3 Host Bus Adapter Clocking |
|---|---|
Use Scenario: Generating the 156.25MHz reference clock for 10GBASE-T PHY ICs in enterprise switches and NICs. IC Role / Device Role / Timing Role: Primary LVPECL clock source synchronized to 25MHz crystal; provides low-jitter differential clock directly to PHY's REFCLK input. Use Value: 0.3ps RMS jitter ensures <0.3UI total jitter at PHY receiver, meeting IEEE 802.3an mask requirements without additional jitter cleaning. | Use Scenario: Delivering 12GHz-equivalent 156.25MHz clock to SAS-3 HBA controllers in storage servers. IC Role / Device Role / Timing Role: Single-output clock generator replacing discrete crystal + buffer; drives multiple SAS PHYs via on-board fanout. Use Value: Eliminates need for external LVPECL fanout buffer while maintaining <0.5ps additive jitter margin for SAS-3 Gen3 link training. |
| 1000BASE-T Transceiver Reference | Industrial Network Switch Timing |
Use Scenario: Providing 125MHz clock (via 20MHz crystal ×6.25) to 1000BASE-T PHYs in managed Layer 2 switches. IC Role / Device Role / Timing Role: Low-cost, single-chip clock source replacing crystal + ECL buffer; supports legacy 125MHz Ethernet timing. Use Value: Reduces BOM count by two components and PCB area by 25mm² versus discrete crystal + buffer solution. | Use Scenario: Generating stable 187.5MHz clock for packet processing ASICs in ruggedized industrial Ethernet switches operating at –40°C to +85°C. IC Role / Device Role / Timing Role: Industrial-grade clock synthesizer with validated thermal performance (QJA = 124°C/W) and extended temp operation. Use Value: Maintains <0.4ps RMS jitter across full temperature range-critical for deterministic packet forwarding latency. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LVPECL clock synthesizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IDT8T49N242BGI8 | Quad-output, I²C-programmable; higher integration but larger 40-QFN package and 1.8V/3.3V supply only | Supports multi-frequency clock trees; not drop-in for single-output 156.25MHz-only use cases | Select when needing programmability or multiple outputs; avoid if minimizing footprint and cost is priority |
| Si5338A-D-GM | Four-output, I²C-configurable; supports fractional-N synthesis and wider frequency range (100Hz–350MHz) | Requires configuration EEPROM and firmware setup; over-specified for fixed 156.25/187.5MHz Ethernet clocks | Choose for flexible clock tree design with variable rates; not recommended for cost-sensitive, fixed-frequency deployments |
Compared with IDT8T49N242BGI8 and Si5338A-D-GM, the PI6LC48P25104LIEX delivers optimal value for dedicated 156.25MHz/187.5MHz Ethernet timing-offering lowest BOM cost, smallest TSSOP-8 footprint, and zero-configuration operation while meeting jitter and temperature requirements without added complexity.
Availability
PI6LC48P25104LIEX is available at Aetrix Electronics and suitable for 10GBASE-T Ethernet PHY timing, SAS-3 host bus adapter clocking, and industrial network switch timing requiring stable component supply across commercial and industrial temperature grades.
Supply support for PI6LC48P25104LIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Pericom Semiconductor (acquired by Diodes Incorporated in 2016) specialized in high-performance clock generation, signal integrity, and interface solutions for networking, computing, and communications infrastructure.
The PI6LC48P25104LIEX belongs to Pericom's HiFlex family-designed specifically for low-jitter, single-output clock synthesis in Ethernet, SATA, and SAS applications where simplicity, reliability, and industrial temperature operation are critical.
FAQ
What crystal specifications are required for stable 156.25MHz output?
The PI6LC48P25104LIEX requires a 25MHz, 18pF parallel-resonant fundamental-mode crystal with ESR ≤50Ω and shunt capacitance ≤7pF. Pericom recommends FL2500047 (3.2×2.5mm, ±20ppm) or FY2500091 (5×3.2mm, ±30ppm). Crystal drive level must not exceed 1mW to prevent aging or instability.
Can the PI6LC48P25104LIEX operate from a 2.5V supply only?
Yes-both VDD and VDDA rails support 2.5V operation (2.375–2.625V), enabling compatibility with 2.5V logic domains. All electrical characteristics-including 0.3ps jitter and LVPECL output voltage levels-are fully specified and guaranteed at 2.5V, with no derating required.
Is LVCMOS input supported on XTAL_IN, and what are the interface requirements?
Yes-XTAL_IN accepts AC-coupled LVCMOS clock signals. Use a series capacitor (e.g., 100nF), limit edge rate to ≤10ns, and reduce amplitude to half-swing to avoid rail interference. XTAL_OUT must be left floating in this mode, and no external crystal is needed.
How does the Freq_SEL pin affect output frequency selection?
When Freq_SEL is pulled LOW (default via internal pull-down), the device multiplies the crystal frequency by 6.25 (e.g., 25MHz → 156.25MHz). When driven HIGH, multiplication is ×7.5 (e.g., 25MHz → 187.5MHz). No external resistors are needed-the internal pull-down ensures default ×6.25 behavior at power-up.
PI6LC48P25104LIEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- HiFlex™
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- PLL:
- Yes
- Main Purpose:
- Ethernet
- Input:
- Crystal
- Output:
- LVPECL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 1:1
- Differential - Input:Output:
- No/Yes
- Frequency - Max:
- 187.5MHz
- Voltage - Supply:
- 2.375V ~ 3.465V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 8-TSSOP
PI6LC48P25104LIEX FAQ
1.How can I place an order for PI6LC48P25104LIEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI6LC48P25104LIEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI6LC48P25104LIEX reliable?
The price and inventory of PI6LC48P25104LIEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6LC48P25104LIEX is usually 5 days.
3.What payment methods are accepted for PI6LC48P25104LIEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6LC48P25104LIEX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PI6LC48P25104LIEX?
PI6LC48P25104LIEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI6LC48P25104LIEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI6LC48P25104LIEX?
For technical support, including PI6LC48P25104LIEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6LC48P25104LIEX requirements.
6.How does Aetrix verify that PI6LC48P25104LIEX is sourced from the original manufacturer or authorized distributors?
All PI6LC48P25104LIEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6LC48P25104LIEX meets industry standards.
7.What is the process for return or replacement of PI6LC48P25104LIEX?
All PI6LC48P25104LIEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6LC48P25104LIEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI6LC48P25104LIEX part is unused and in its original packaging.
Return procedure for PI6LC48P25104LIEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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