Diodes Incorporated PI6LC48S25BZBBIEX

Overview

PI6LC48S25BZBBIEX from Diodes Incorporated is a low-phase-noise LC-VCO-based Ethernet clock generator designed for 10GbE systems, accepting a 25MHz crystal or differential reference (25/125/156.25MHz), and delivering four independently configurable output banks (A–D) at frequencies including 312.5, 156.25, 125, 100, 50, and 25MHz with LVPECL/LVDS signaling.

For engineers reviewing the PI6LC48S25BZBBIEX datasheet, PI6LC48S25BZBBIEX pinout, PI6LC48S25BZBBIEX application, or PI6LC48S25BZBBIEX equivalent, this device supports both pin-strapping and I²C configuration, offers PLL bypass mode for test, delivers 0.3ps integrated phase jitter (12kHz–20MHz @156.25MHz), and provides dedicated oscillator output (X_OUT) for system-level noise isolation.

Technical Context

The PI6LC48S25BZBBIEX implements an LC-based VCO architecture optimized for low-jitter 10GbE clock synthesis, with dual input paths (crystal via X_IN/X_OUT or differential via IN+/IN−) selectable by IN_SEL, and programmable dividers enabling simultaneous generation of up to eight distinct output frequencies across four banks.

Each bank supports independent output format selection (LVPECL or LVDS), frequency control (via tri-level FS pins or I²C registers), and output enable/disable per channel; Bank D further separates CMOS and differential outputs, while PLL_BYPASS allows direct pass-through of reference input to Banks A–C for validation and debug.

Key Specifications

Pinout & Package

56-pin 8×8mm TQFN (ZBB) package with exposed thermal pad (E-pad) connected to GND; pin pitch is 0.5mm; RoHS-compliant and halogen-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Ethernet clock generator applications.

Compared with IDT8T49N242A and Si5332A-D-GM, the PI6LC48S25BZBBIEX delivers optimal balance of jitter performance, pin-strappable simplicity, and integrated oscillator functionality specifically for cost-sensitive, high-volume 10GbE infrastructure - avoiding over-engineering while meeting exact IEEE 802.3ae timing budgets.

Availability

PI6LC48S25BZBBIEX is available at Aetrix Electronics and suitable for 10GbE switch fabric, multi-rate SerDes timing, optical transport unit (OTU) timing, and industrial Ethernet controller applications requiring stable component supply across extended product lifecycles.

Supply support for PI6LC48S25BZBBIEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability timing, power management, and signal integrity solutions for industrial, communications, and computing markets.

The PI6LC48S25BZBBIEX belongs to Diodes' HiFlex™ Ethernet clock generator family, engineered specifically to replace legacy crystal oscillators and discrete PLLs in 10GbE infrastructure with integrated, low-jitter, multi-output clock synthesis.

FAQ

What input configurations does the PI6LC48S25BZBBIEX support?

The device accepts either a 25MHz parallel-resonant crystal (connected to X_IN/X_OUT) or differential reference inputs (25MHz, 125MHz, or 156.25MHz) on IN+/IN−. Input selection is controlled by the IN_SEL pin, and the INFREQ_SEL pin configures the expected reference frequency for proper PLL lock behavior.

How is output signaling selected per bank?

Each output bank (A–D) uses tri-level control pins (e.g., QA_Mode, QB_Mode0/QB_Mode1) to configure LVPECL or LVDS signaling. For Bank D, QD_Mode selects differential output format, while QD1 is a dedicated CMOS output. All mode selections are hardware-configurable and can be overridden via I²C registers.

Does the PI6LC48S25BZBBIEX require external loop filtering?

No. The PI6LC48S25BZBBIEX uses an integrated LC-VCO architecture with fully on-chip loop filter components. No external capacitors or resistors are needed for PLL stabilization - simplifying layout and eliminating tuning variables during design validation.

Can the device generate non-Ethernet frequencies like PCIe or SATA references?

Yes. While optimized for Ethernet (25/125/156.25/312.5MHz), its programmable dividers support 100MHz (PCIe Gen2), 125MHz (SATA), and 25MHz (USB 2.0) outputs. The 312.5MHz output also serves PCIe Gen4 and 25G Ethernet applications, confirmed in the Output Frequency I²C Control Table (page 9).