Diodes Incorporated PI6ULS5V9617BUEX
- Part No.:
- PI6ULS5V9617BUEX
- Manufacturer:
- Diodes Incorporated
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
PI6ULS5V9617BUEX.pdf
- Description:
- IC TRANSLTR BIDIRECTIONAL 8MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PI6ULS5V9617BUEX from Diodes Incorporated is a 2-channel bidirectional I²C-bus/SMBus repeater IC enabling voltage-level translation between 0.6V–5.5V (Port A) and 2.2V–5.5V (Port B), supporting Fast-mode Plus (1 MHz), arbitration, clock stretching, and 540 pF bus capacitance per side at full speed. It isolates bus segments for mixed-voltage systems such as 0.9V microcontrollers interfacing with 3.3V sensors in industrial IoT edge nodes.
For engineers reviewing the PI6ULS5V9617BUEX datasheet, PI6ULS5V9617BUEX pinout, PI6ULS5V9617BUEX application, or PI6ULS5V9617BUEX equivalent, this device delivers verified bidirectional level-shifting with static offset compensation on Port B and adjustable threshold logic on Port A-critical for low-voltage I²C extension without signal integrity degradation.
Technical Context
The PI6ULS5V9617BUEX implements dual open-drain bidirectional buffers with independent supply domains: VCC(A) powers input threshold references (0.35×VCC(A) for LOW detection), while all logic and I/Os are powered by VCC(B). Its B-side drivers use static offset (~0.55V VOL) to prevent lockup during low-voltage transitions, whereas A-side drivers deliver near-0V LOW output compatible with sub-1V logic.
Propagation delays are asymmetric and direction-dependent: A→B tPHL is 50–173 ns, B→A tPHL is 76–152 ns; enable/disable timing is ≤100 ns. The EN pin is referenced to VCC(B), requires idle-state assertion, and internally pulls up to VCC(B)-ensuring safe power-up sequencing and bus isolation during system reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Bus Speed Support | Fm+ (Fast-mode Plus) up to 1 MHz; also supports Standard-mode (100 kHz), Fast-mode (400 kHz), SMBus, PMBus, and multi-master arbitration. |
| Port A Voltage Range | 0.6V to 5.5V; enables interface with ultra-low-voltage logic (e.g., 0.8V/0.9V MCUs) while maintaining valid input thresholds (VIL ≤ 0.35×VCC(A)). |
| Port B Voltage Range | 2.2V to 5.5V; includes static offset design ensuring reliable LOW recognition (VIL ≤ 0.4V) and buffered LOW output (~0.55V) to avoid bus lockup. |
| Capacitance Handling | 540 pF per bus segment at 1 MHz; extends to 4000 pF at lower speeds-enables longer PCB traces or higher node counts without signal integrity loss. |
| ESD Robustness | 8000V HBM per JESD22-A114-supports handling in non-ESD-controlled assembly environments without latch-up risk. |
| Enable Logic | Active HIGH EN referenced to VCC(B); internal pull-up ensures default-enabled operation after VCC(B) ≥ 2.2V and 400 μs reference settling. |
| Overvoltage Tolerance | All I/O pins (SDAA, SCLA, SDAB, SCLB, EN) tolerate up to 5.5V regardless of VCC(A)/VCC(B) state-including fully unpowered condition. |
Pinout & Package
Package: 8-pin MSOP (U), RoHS-compliant, halogen- and antimony-free "Green" construction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC(A) | Port A supply reference | Sets input threshold (0.35×VCC(A)) and enables power-good detection; does not power I/O drivers. |
| SCLA | Port A serial clock I/O | Open-drain, 5.5V-tolerant; driven low by internal buffer when SCLB falls below 0.4V. |
| SDAA | Port A serial data I/O | Open-drain, 5.5V-tolerant; mirrors SDAB behavior with near-0V LOW output for sub-1V compatibility. |
| GND | Common ground reference | Required return path for both ports; no separate analog/digital grounds-single-point grounding sufficient. |
| EN | Repeater enable control | Active HIGH, referenced to VCC(B); must be stable during I²C transactions to prevent bus hang. |
| SDAB | Port B serial data I/O | Open-drain, 5.5V-tolerant; features ~0.55V buffered LOW to prevent false LOW latching on cascaded repeaters. |
| SCLB | Port B serial clock I/O | Open-drain, 5.5V-tolerant; same buffered LOW behavior as SDAB; supports clock stretching propagation. |
| VCC(B) | Main power supply | Powers all logic, comparators, and I/O drivers; minimum 2.2V required for functional operation and internal reference stability. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional capacitance isolation | Enables two independent 540 pF I²C segments at 1 MHz-doubles allowable trace length or node count without signal rise-time degradation. |
| Asymmetric voltage translation | Port A accepts 0.6V logic (e.g., ARM Cortex-M0+ cores), Port B interfaces natively with 2.5V/3.3V/5V peripherals-no external level shifters needed. |
| Static offset compensation (Port B) | Prevents bus lockup by ensuring internal LOW output (~0.55V) remains distinguishable from input LOW threshold (≤0.4V), even under noise or slow edges. |
| Power-off high-impedance I/O | All SDA/SCL pins float to Hi-Z when VCC(A)=0V or VCC(B)=0V-enables hot-swap capability and prevents back-powering of unpowered subsystems. |
| Idle-state enable control | EN pin can safely isolate faulty slaves during power-up reset; changing EN mid-transaction is prohibited and would stall the bus. |
Applications
| Industrial Sensor Hub | Automotive Body Control Module |
|---|---|
|
Use Scenario: A 0.9V ultra-low-power MCU communicates with multiple 3.3V temperature/humidity/pressure sensors across a 15 cm PCB trace run. IC Role / Device Role / Timing Role: I²C repeater and level translator that isolates capacitance, extends bus reach, and translates 0.9V logic to 3.3V domain without external resistors or active components. Use Value: Eliminates need for discrete MOSFET translators; maintains 1 MHz Fm+ timing budget despite 420 pF total bus load from 8 sensors and routing. |
Use Scenario: Central body controller (3.3V) manages distributed door modules (1.2V CAN/I²C gateways) via daisy-chained I²C segments. IC Role / Device Role / Timing Role: Bidirectional repeater enabling voltage translation and arbitration-aware bus extension between 3.3V master and 1.2V slave domains. Use Value: Supports clock stretching from low-voltage slaves while preserving master-initiated timeouts; withstands automotive load dump transients due to 5.5V I/O tolerance. |
| Medical Wearable Subsystem | Server Baseboard Management |
|
Use Scenario: An energy-harvesting SoC (0.6V core) reads biometric sensor data over I²C from 2.5V analog front-end ICs in a compact wearable enclosure. IC Role / Device Role / Timing Role: Low-voltage I²C repeater providing near-zero-VOL output on Port A to meet sub-0.3V LOW threshold requirements of 0.6V logic. Use Value: Enables direct interface without LDOs or charge pumps; quiescent current <8 μA at VCC(A)=0.95V minimizes battery drain during sleep mode. |
Use Scenario: BMC (3.3V) monitors thermal sensors, VRMs, and DIMMs across multiple server mezzanine cards using segmented I²C buses. IC Role / Device Role / Timing Role: Isolating repeater allowing star-topology connection of 6+ sensor nodes to single BMC port while maintaining Fm+ timing margins. Use Value: Prevents cumulative capacitance-induced timing violations; ESD rating (8 kV HBM) protects against handling damage during field maintenance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar I²C bus repeater applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PCA9515DP,118 | Single-channel, fixed 1.8V–5.5V translation; no Port A voltage flexibility below 1.8V; lacks static offset compensation on high-side port. | Supports only standard/fast-mode (≤400 kHz); not rated for Fm+ (1 MHz); no 0.6V–1.2V logic support. | Select when only 1.8V+ domains are involved and Fm+ speed is unnecessary; lower cost but limited low-voltage interoperability. |
| TCA9617APWR | 2-channel with auto-direction sensing; supports 0.8V–5.5V on both sides; no static offset-uses dynamic threshold tracking instead. | Higher propagation delay (typ. 220 ns A↔B); less robust against bus noise on low-voltage side; no 5.5V I/O tolerance on all pins. | Choose for symmetric low-voltage systems (e.g., dual 0.8V domains); avoid where Port B static offset is required to prevent lockup with legacy Fm devices. |
Compared with PCA9515DP and TCA9617APWR, the PI6ULS5V9617BUEX uniquely supports true 0.6V logic translation with Port A threshold scaling, delivers Fm+ timing compliance, and uses proven static offset architecture to eliminate bus lockup-making it the only option for robust ultra-low-voltage I²C extension in mission-critical embedded systems.
Availability
PI6ULS5V9617BUEX is available at Aetrix Electronics and suitable for industrial sensor hubs, automotive body control modules, medical wearables, and server baseboard management requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant green packaging.
Supply support for PI6ULS5V9617BUEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, specializing in high-performance, high-reliability solutions for power management, signal integrity, and connectivity applications.
The PI6ULS5V9617BUEX belongs to Diodes' Pericom® I²C infrastructure portfolio, designed specifically to solve mixed-voltage I²C scalability challenges in space-constrained, low-power, and noise-sensitive embedded systems.
FAQ
Can PI6ULS5V9617BUEX operate with VCC(A) = 0.6V and VCC(B) = 2.2V simultaneously?
Yes. The device is fully specified for this condition: VCC(A) ≥ 0.6V and VCC(B) ≥ 2.2V satisfy absolute minimums, and the constraint 0.4×VCC(A) + 0.8V ≤ VCC(B) holds (0.4×0.6 + 0.8 = 1.04V ≤ 2.2V). At these rails, Port A achieves valid LOW detection (VIL ≤ 0.35×0.6 = 0.21V) and Port B delivers ~0.55V VOL-verified in DS42539 Rev 2-2 Section 4 DC Characteristics.
What happens if EN is toggled during an active I²C transaction?
Toggling EN mid-transaction will halt bus communication: disabling EN forces both ports into high-impedance state while SDA/SCL lines remain driven by external pull-ups, breaking arbitration and preventing clock stretching acknowledgment. The datasheet explicitly warns against EN state changes except during bus idle periods (Section 7.3 Functional Description).
Does PI6ULS5V9617BUEX support SMBus Alert Response Address (ARA) protocol?
Yes. As a transparent, bidirectional repeater with full arbitration and clock stretching support, it passes SMBus ARA traffic (including 0x0C address broadcast and slave response) without modification. This is confirmed by its qualification for SMBus standard and high-power mode in the Features list and Application Information section.
Is there a recommended pull-up resistor value for 1 MHz operation with 300 pF bus load?
For 1 MHz Fm+ with 300 pF load per side, Diodes recommends RL = 1.35 kΩ on Port B and matching pull-up on Port A (DS42539 Rev 2-2 Figure 4 test condition). This yields ~67.5 ns RC time constant-below the 100 ns minimum required to avoid turnaround bounce on Port B's buffered LOW transitions.
PI6ULS5V9617BUEX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- -
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Translator Type:
- Voltage Level
- Channel Type:
- Bidirectional
- Number of Circuits:
- 1
- Channels per Circuit:
- 2
- Voltage - VCCA:
- 0.6 V ~ 5.5 V
- Voltage - VCCB:
- 2.2 V ~ 5.5 V
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- Open Drain
- Data Rate:
- 1MHz
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
PI6ULS5V9617BUEX FAQ
1.How can I place an order for PI6ULS5V9617BUEX through Aetrix?
Please submit a Request for Quotation (RFQ) for PI6ULS5V9617BUEX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PI6ULS5V9617BUEX reliable?
The price and inventory of PI6ULS5V9617BUEX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PI6ULS5V9617BUEX is usually 5 days.
3.What payment methods are accepted for PI6ULS5V9617BUEX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PI6ULS5V9617BUEX transactions.
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4.How is shipping managed for PI6ULS5V9617BUEX?
PI6ULS5V9617BUEX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PI6ULS5V9617BUEX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PI6ULS5V9617BUEX?
For technical support, including PI6ULS5V9617BUEX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PI6ULS5V9617BUEX requirements.
6.How does Aetrix verify that PI6ULS5V9617BUEX is sourced from the original manufacturer or authorized distributors?
All PI6ULS5V9617BUEX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PI6ULS5V9617BUEX meets industry standards.
7.What is the process for return or replacement of PI6ULS5V9617BUEX?
All PI6ULS5V9617BUEX units undergo pre-shipment inspection (PSI). If there is an issue with PI6ULS5V9617BUEX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PI6ULS5V9617BUEX part is unused and in its original packaging.
Return procedure for PI6ULS5V9617BUEX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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