Diodes Incorporated PI7C9X7952BFDEX-55

Overview

PI7C9X7952BFDEX-55 from Diodes Incorporated is a PCI Express® 2.0-compliant dual UART bridge IC with integrated PCIe endpoint logic, two independent 16C950-compatible UART channels, 128-byte transmit/receive FIFOs, and programmable baud rates up to 15 Mbps. It operates at 1.8 V core / 3.3 V I/O, supports MSI interrupts, and is used in industrial PC add-in cards, embedded server management controllers, and legacy serial device connectivity over PCIe.

For engineers reviewing the PI7C9X7952BFDEX-55 datasheet, PI7C9X7952BFDEX-55 pinout, PI7C9X7952BFDEX-55 application, or PI7C9X7952BFDEX-55 equivalent, key selection criteria include PCIe 2.0 endpoint compliance, dual UART channel independence, FIFO depth, MSI interrupt support, and EEPROM-based configuration storage.

Technical Context

This device functions as a PCIe-to-serial bridge, translating PCIe TLPs into UART register accesses via an on-chip PCIe endpoint controller. It implements full PCI Express Base Specification v2.0 (2.5 GT/s), supports both memory-mapped and I/O space access modes, and includes dedicated configuration space for each UART channel.

The UART subsystem conforms to 16C950 architecture with enhanced features including automatic RTS/CTS flow control, fractional baud rate generation using a 48-bit divisor, and selectable clock sources (internal PLL or external crystal). Each UART has independent interrupt masking, status reporting, and programmable FIFO trigger levels.

Key Specifications

Pinout & Package

Package: 160-pin LFBGA (9 mm × 9 mm, 0.65 mm pitch), RoHS-compliant, moisture sensitivity level 3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PCIe-to-serial bridge applications.

Compared with AX99100-169, PI7C9X7952BFDEX-55 offers superior FIFO depth and EEPROM-based configuration persistence; compared with PI7C9X7954, it delivers identical UART performance in a smaller package with lower power, making it optimal for dual-port PCIe serial expansion.

Availability

PI7C9X7952BFDEX-55 is available at Aetrix Electronics and suitable for industrial PC expansion cards, server baseboard management controllers (BMC), and medical device data loggers requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for PI7C9X7952BFDEX-55 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and integrated circuits, headquartered in California, with design, manufacturing, and sales operations across Asia, Europe, and the Americas.

The PI7C9X7952 belongs to Diodes' PCIe bridge IC product line, engineered specifically for legacy serial interface consolidation into modern PCIe platforms-targeting industrial, computing, and communications infrastructure where reliability and driver compatibility are critical.

FAQ

Does PI7C9X7952BFDEX-55 support PCIe 3.0?

No. The device complies strictly with PCI Express Base Specification v2.0 and operates at 2.5 GT/s (Gen1 speed only). It does not negotiate or function at 5.0 GT/s (Gen2) or higher. Its PCIe configuration space and link training logic are implemented for Gen1-only operation, as confirmed in Section 5.2.1 and Table 9.2 of the datasheet.

Can both UART channels operate at different baud rates simultaneously?

Yes. Each UART channel has independent baud rate generators, line control registers, and FIFO configurations. The datasheet confirms in Section 5.2.12 that "each UART channel has its own 48-bit divisor latch and clock prescaler," enabling concurrent operation at distinct baud rates (e.g., 115.2 kbps on UART0 and 3 Mbps on UART1) without interference.

Is external EEPROM mandatory for operation?

No. The device boots using default configuration values stored in mask ROM if EEPROM is absent or fails CRC check. However, EEPROM is required to customize vendor/device IDs, subsystem IDs, and UART default settings. Section 4.2.5 and Figure 8.1 confirm the EEPROM interface is optional but necessary for field-programmable identity.

What is the maximum sustained serial data throughput per UART channel?

At 15 Mbps baud rate with 8N1 framing, each UART supports up to 1.5 MB/s (1,500,000 bytes/sec) of sustained data transfer. This is achievable due to the 128-byte FIFO and hardware flow control-verified in Section 5.2.8 and Table 5.2, which lists 15 Mbps as the maximum supported rate with ≤1.0% error.