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Microchip Technology PM40036B-F3EI
- Part No.:
- PM40036B-F3EI
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- 753-BBGA
- Datasheet:
-
PM40036B-F3EI.pdf
- Description:
- PFX 36XG4, 36-LANE GEN4 FANOUT P
- Quantity:
- Payment:
- Shipping:
Inventory:1,007
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Product details
Overview
PM40036B-F3EI from Microchip Technology is a PCIe Gen 4 fanout switch IC with 36 lanes, 20 ports (18 NTBs), 10 virtual switch partitions, and per-port hot- and surprise-plug controllers - deployed in data center servers, cellular infrastructure baseband units, and video broadcast routing systems.
For engineers reviewing the PM40036B-F3EI datasheet, PM40036B-F3EI pinout, PM40036B-F3EI application, or PM40036B-F3EI equivalent, key selection criteria include lane count scalability, NTB assignment flexibility, DPC/AER error containment compliance, and support for SFF-8643/OCuLink passive and optical interconnects.
Technical Context
The PM40036B-F3EI implements a non-blocking PCIe Gen 4 switch fabric with 16 GT/s SERDES, supporting x1/x2/x4/x8/x16 port bifurcation without upstream/downstream port mapping restrictions. It integrates a MIPS processor for firmware execution and supports logical non-transparent bridging across all 20 ports.
Error containment includes Downstream Port Containment (DPC) on every downstream port, Completion Timeout Synthesis (CTS), and Advanced Error Reporting (AER) - enabling fault isolation in multi-root complex topologies used in telecom and defense servers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Lane Count | 36 PCIe Gen 4 lanes - enables scalable I/O expansion from single root to multiple endpoints without lane starvation. |
| Port Count / NTBs | 20 ports, 18 assignable non-transparent bridges - allows secure peer-to-peer memory-mapped communication between isolated domains (e.g., CPU ↔ FPGA, host ↔ accelerator). |
| Virtual Partitions | 10 virtual switch partitions - provides hardware-enforced traffic isolation for multi-tenant server or network function virtualization (NFV) deployments. |
| Hot-Plug Controllers | 20 per-port hot- and surprise-plug controllers - ensures safe insertion/removal of PCIe devices (e.g., NVMe SSDs, FPGA accelerators) without system reset. |
| PCIe Speed | Gen 4 (16 GT/s) with compliant link training - guarantees interoperability with Gen 4 hosts and endpoints while maintaining backward compatibility to Gen 3. |
| Integrated Processor | MIPS-based embedded processor - executes switch configuration, diagnostics, and security boot firmware independently of host CPU. |
Pinout & Package
PM40036B-F3EI is housed in a 27 mm × 27 mm, 780-pin FC-BGA package with edge-aligned signal balls optimized for high-speed PCIe routing and thermal dissipation in dense server PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK_IN[1:0] | Differential reference clock input | Accepts 100 MHz differential PCIe reference clock; required for Gen 4 link initialization and clock recovery. |
| PERST# | Global reset input | Active-low asynchronous reset that initializes switch logic, SERDES, and partition configuration registers. |
| GPIO[15:0] | Configurable general-purpose I/O | Supports SMBus, SGPIO, or cable-detection signaling per JTAG-configured function - used for hot-plug status reporting and connector presence sensing. |
| PRSNT#_n | Per-port presence detect | Indicates physical card insertion at each downstream port; enables automatic power sequencing and enumeration in modular chassis. |
| JTAG_TCK/TMS/TDI/TDO | IEEE 1149.1 boundary-scan interface | Enables in-system programming, silicon validation, and real-time debug trace without host intervention. |
Key Features
| Feature | Design Value |
|---|---|
| Per-port hot- and surprise-plug control | Enables live replacement of NVMe SSDs or FPGA mezzanine cards in carrier-grade servers without OS reboot or service interruption. |
| Downstream Port Containment (DPC) | Contains PCIe AER errors within a single downstream port - prevents error propagation to host or other endpoints during field failures. |
| Flexible port bifurcation | Allows any port to be configured as x1/x2/x4/x8/x16 dynamically via configuration space - eliminates fixed topology constraints in storage or AI acceleration racks. |
| Non-transparent bridge (NTB) support | Provides memory-mapped peer-to-peer DMA between isolated address spaces - essential for secure co-processing in defense radar or 5G baseband subsystems. |
| Real-time eye capture | On-chip SERDES eye diagram sampling enables field-deployable signal integrity validation without external test equipment. |
Applications
| Data Center Storage Rack | 5G Radio Unit (RU) |
|---|---|
Use Scenario: Aggregating 18 NVMe SSDs behind a dual-socket Xeon server using PCIe fanout to eliminate switch bottlenecks. IC Role / Device Role / Timing Role: PCIe Gen 4 fanout switch managing lane allocation, hot-plug coordination, and NTB-based host-to-SSD memory sharing. Use Value: Delivers 36 GB/s aggregate bandwidth with deterministic latency under mixed read/write workloads and zero downtime during SSD replacement. | Use Scenario: Interconnecting FPGA-based digital front-end (DFE) and RFIC modules in Open RAN radio units requiring low-latency, isolated data paths. IC Role / Device Role / Timing Role: Non-transparent bridge controller enabling secure, memory-coherent DMA transfers between baseband processor and radio processing FPGA. Use Value: Achieves sub-100 ns inter-domain latency with hardware-enforced memory protection - meeting 3GPP FR1 timing alignment requirements. |
| Broadcast Video Router | Defense Radar Signal Processor |
Use Scenario: Routing uncompressed 4K/8K video streams from multiple camera inputs to GPU-accelerated encoding blades in live production trucks. IC Role / Device Role / Timing Role: High-reliability PCIe switch providing redundant upstream links and per-port error containment for continuous airtime operation. Use Value: Maintains uninterrupted video flow during cable disconnect events or transient SERDES errors - critical for live broadcast SLAs. | Use Scenario: Connecting multiple ADC/DAC modules, DSP FPGAs, and safety-critical control processors in airborne radar subsystems with strict DO-254 compliance. IC Role / Device Role / Timing Role: Partitioned PCIe switch enforcing hardware-isolated data planes between sensor acquisition, real-time processing, and mission management domains. Use Value: Enables independent certification of each virtual partition while sharing physical I/O resources - reducing SWaP-C by 38% vs discrete switches. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe fanout switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PM40052B-F3EI | 52-lane, 28-port, 14-partition variant - higher lane count and port density than PM40036B-F3EI. | Suitable for larger-scale storage enclosures or AI training nodes requiring >20 endpoints. | Select when scaling beyond 20 downstream devices or needing additional NTBs for multi-host coherency. |
| PM40028B-F3EI | 28-lane, 16-port, 8-partition variant - lower lane count and reduced partitioning capability. | Optimized for cost-sensitive edge servers or compact 5G small cells with ≤16 endpoints. | Choose for space-constrained designs where full 36-lane capacity is unused and BOM cost reduction is prioritized. |
Compared with PM40052B-F3EI and PM40028B-F3EI, the PM40036B-F3EI delivers optimal balance of lane efficiency, partition granularity, and NTB count for mid-tier telecom and broadcast systems - avoiding over-provisioning while ensuring sufficient headroom for future endpoint additions.
Availability
PM40036B-F3EI is available at Aetrix Electronics and suitable for data center storage, 5G infrastructure, broadcast video routing, and defense radar signal processing requiring stable component supply across long-life industrial programs.
Supply support for PM40036B-F3EI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, Flash-IP, and secure connectivity solutions for industrial, automotive, and communications markets.
The Switchtec PFX Gen 4 family - including PM40036B-F3EI - was engineered to deliver carrier-grade reliability, hardware-enforced security, and flexible PCIe topology management for next-generation telecom infrastructure and high-assurance computing platforms.
FAQ
What is the maximum number of non-transparent bridges supported by the PM40036B-F3EI?
The PM40036B-F3EI supports up to 18 non-transparent bridges (NTBs), assignable to any of its 20 ports. This enables secure, memory-mapped peer-to-peer DMA between isolated domains - a core requirement for applications like 5G baseband processing and defense radar subsystems where data domain separation is mandatory. The PM40036B-F3EI's NTB implementation complies with PCIe Base Spec 4.0 and supports both inbound and outbound address translation.
Does the PM40036B-F3EI support PCIe Gen 4 link training with optical cables?
Yes, the PM40036B-F3EI supports PCIe Gen 4 link training with optical cables via manual PHY configuration mode. It is compatible with OCuLink and SFF-8643 connectors used in active optical cable (AOC) assemblies. The PM40036B-F3EI's SERDES includes calibration and equalization controls specifically tuned for optical channel loss compensation, and real-time eye capture functionality validates signal integrity directly at the receiver.
How many virtual switch partitions does the PM40036B-F3EI provide, and what is their purpose?
The PM40036B-F3EI provides 10 hardware-enforced virtual switch partitions. Each partition operates as an independent switching domain with isolated configuration space, error reporting, and traffic management - enabling multi-tenant resource allocation in cloud data centers or functional safety isolation in avionics systems. These partitions are configured via the PM40036B-F3EI's integrated MIPS processor and persist across warm resets.
Can the PM40036B-F3EI perform real-time eye diagram capture without external test equipment?
Yes, the PM40036B-F3EI includes on-die real-time eye capture capability accessible through ChipLink diagnostic tools. This feature samples the actual received waveform at the SERDES receiver, generating eye diagrams for all 36 lanes without requiring external BERT or oscilloscopes. Engineers use this directly in field deployments to validate signal integrity after board bring-up or during maintenance of broadcast video routers and cellular infrastructure units containing the PM40036B-F3EI.
What peripheral interfaces are integrated into the PM40036B-F3EI besides PCIe?
Beyond PCIe Gen 4 switching, the PM40036B-F3EI integrates up to 11 Two-Wire Interfaces (TWIs) with SMBus support, up to 4 SGPIO ports compliant with SFF-8485, and JTAG/EJTAG debug interfaces. It does not include Ethernet MAC or UART peripherals - those are present only in higher-lane variants (e.g., PM40100). All I/Os are configurable via the PM40036B-F3EI's internal register map and managed by its embedded MIPS processor.
PM40036B-F3EI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- Switchtec
- Package/Case:
- 753-BBGA
- Packaging:
- Tray
- Product Status:
- Obsolete
- Applications:
- Fanout PCIe Switch
- Interface:
- 2-Wire, JTAG, UART
- Voltage - Supply:
- -
- Supplier Device Package:
- 753-BBGA (29x29)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PM40036B-F3EI FAQ
1.How can I place an order for PM40036B-F3EI through Aetrix?
Please submit a Request for Quotation (RFQ) for PM40036B-F3EI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PM40036B-F3EI reliable?
The price and inventory of PM40036B-F3EI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM40036B-F3EI is usually 5 days.
3.What payment methods are accepted for PM40036B-F3EI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM40036B-F3EI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PM40036B-F3EI?
PM40036B-F3EI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PM40036B-F3EI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PM40036B-F3EI?
For technical support, including PM40036B-F3EI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM40036B-F3EI requirements.
6.How does Aetrix verify that PM40036B-F3EI is sourced from the original manufacturer or authorized distributors?
All PM40036B-F3EI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM40036B-F3EI meets industry standards.
7.What is the process for return or replacement of PM40036B-F3EI?
All PM40036B-F3EI units undergo pre-shipment inspection (PSI). If there is an issue with PM40036B-F3EI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PM40036B-F3EI part is unused and in its original packaging.
Return procedure for PM40036B-F3EI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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