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Microchip Technology PM42028B1-F3EI
- Part No.:
- PM42028B1-F3EI
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- 753-BBGA
- Datasheet:
-
PM42028B1-F3EI.pdf
- Description:
- PCIE SWITCH GEN4 X28 PAX 753BBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,062
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Product details
Overview
PM42028B1-F3EI from Microchip Technology is a Gen 4 PCIe fabric switch with 28 lanes, 16 ports, and per-port hot- and surprise-plug controllers, designed for multi-host SR-IOV sharing of NVMe SSDs and GPUs in rack-scale architectures.
For engineers reviewing the PM42028B1-F3EI datasheet, PM42028B1-F3EI pinout, PM42028B1-F3EI application, or PM42028B1-F3EI equivalent, key selection criteria include lane count, port bifurcation flexibility (×1*/×2/×4/×8/×16), error containment features (AER, DPC, poisoned TLP blocking), integrated MIPS processor, and support for in-band PCIe/UART/TWI/Ethernet management.
Technical Context
The PM42028B1-F3EI implements a non-blocking PCIe Gen 4 switch fabric with full 16 GT/s SerDes compliance and end-to-end data integrity protection including ECC on internal RAMs. It supports manual PHY configuration and link training for OCuLink, SFF-8644, and CEM ×16 interfaces.
Its system-on-chip architecture integrates a MIPS processor, up to 103 GPIOs, 11 TWI/SMBus interfaces, 4 SGPIO ports, and a 10/100 Ethernet MAC - enabling autonomous fabric management without an external CPU for SR-IOV virtualization and endpoint pooling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Lane Count | 28 PCIe Gen 4 lanes - enables scalable I/O expansion with up to 16 configurable ports |
| Port Count | 16 ports - supports flexible upstream/downstream assignment and full bifurcation (×1*/×2/×4/×8/×16) |
| Hot-Plug Controllers | 16 independent hot- and surprise-plug controllers - ensures safe insertion/removal per port in shared infrastructure |
| Error Containment | Per-port Advanced Error Reporting (AER) and Downstream Port Containment (DPC) - isolates faults to prevent system-wide failure |
| Integrated Processor | MIPS-based embedded processor - executes fabric management firmware and SR-IOV virtualization logic without external host CPU |
| Package | 29 mm × 29 mm BGA - standard footprint compatible with high-density server and JBOF PCB layouts |
| I/O Interfaces | Up to 11 TWI/SMBus, 4 SGPIO, 4 UART, 10/100 Ethernet MAC, 16-bit local bus with ECC - enables enclosure management and diagnostics |
Pinout & Package
PM42028B1-F3EI is housed in a 29 mm × 29 mm BGA package with 784 balls. Pin functions are defined per Microchip's official pinout documentation for the PAX 28xG4 family; no public pin mapping is published for this specific variant outside of controlled SDK and NDA-bound design resources.
Key Features
| Feature | Design Value |
|---|---|
| PCIe Gen 4 16 GT/s SerDes | Enables full bandwidth utilization across all 28 lanes with low-power, high-signal-integrity transceivers |
| SR-IOV Domain Virtualization | Allows physical and virtual function abstraction of NVMe SSDs and GPUs across multiple hosts without hypervisor dependency |
| Per-Port Completion Timeout Synthesis (CTS) | Prevents upstream host lockup during incomplete non-posted transactions by synthesizing timeout completions |
| Real-Time 2D Eye Capture | Provides in-system signal integrity validation for each PCIe Gen 4 lane without external test equipment |
| Secure Boot with Image Authentication | Ensures only signed, validated firmware executes - critical for trusted fabric deployment in multi-tenant environments |
Applications
| Composable GPU Fabric | JBOF with SR-IOV NVMe Sharing |
|---|---|
Use Scenario: Multiple compute nodes dynamically allocate GPU resources from a shared pool via PCIe fabric. IC Role / Device Role / Timing Role: PM42028B1-F3EI acts as the central non-blocking PCIe switch enabling low-latency, multi-host GPU access with SR-IOV virtual function partitioning. Use Value: Eliminates PCIe tree bottlenecks and enables GPU time-slicing across bare-metal and VM workloads without PCIe switch stacking. | Use Scenario: A JBOD-style storage enclosure exposes NVMe SSDs to multiple hosts using SR-IOV virtual functions. IC Role / Device Role / Timing Role: PM42028B1-F3EI serves as the fabric controller managing port arbitration, hot-plug events, and AER reporting for each NVMe endpoint. Use Value: Delivers deterministic latency and fault isolation between hosts sharing the same physical NVMe drives. |
| Rack-Scale Disaggregated Compute | Multi-Host AI Training Cluster |
Use Scenario: Compute, memory, and storage resources are physically separated and interconnected via standardized PCIe links. IC Role / Device Role / Timing Role: PM42028B1-F3EI provides the interconnect backbone that maintains Gen 4 bandwidth and error containment across resource pools. Use Value: Enables hardware-level resource elasticity while preserving PCIe protocol compliance and thermal/power efficiency. | Use Scenario: Distributed AI training across multiple servers requires synchronized GPU and NVMe access with minimal interconnect overhead. IC Role / Device Role / Timing Role: PM42028B1-F3EI routes PCIe traffic between host CPUs, GPUs, and NVMe storage with per-port DPC and poisoned TLP blocking. Use Value: Guarantees fault containment during long-running training jobs, preventing single-device errors from halting entire clusters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe fabric switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PM42036B1-F3EI | 36 lanes, 20 ports, same 29 mm × 29 mm package - higher lane/port count with identical feature set | Supports larger endpoint pools and more complex topologies requiring ≥20 ports | Select when scaling beyond 16 ports while retaining identical software stack and thermal profile |
| PM42052B1-F3EI | 52 lanes, 28 ports, same 29 mm × 29 mm package - adds 24 more lanes and 12 ports over PM42028B1-F3EI | Targeted at dense JBOFs and multi-chassis fabrics needing >16 ports per switch | Choose for higher aggregate bandwidth and endpoint density where board space allows same footprint |
Compared with PM42028B1-F3EI, PM42036B1-F3EI and PM42052B1-F3EI offer incremental lane and port scaling within identical packaging and firmware compatibility - enabling seamless upgrade paths without PCB redesign or driver changes.
Availability
PM42028B1-F3EI is available at Aetrix Electronics and suitable for rack-scale disaggregated systems, SR-IOV-enabled JBOFs, and composable GPU fabrics requiring stable component supply and long-term lifecycle support.
Supply support for PM42028B1-F3EI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, FPGAs, and connectivity solutions with emphasis on reliability and long-life product support.
The Switchtec PAX family was developed specifically for high-reliability PCIe fabric architectures in datacenter, AI, and enterprise storage - prioritizing SR-IOV virtualization, error containment, and autonomous management.
FAQ
What is the maximum PCIe Gen 4 lane count supported by PM42028B1-F3EI?
The PM42028B1-F3EI supports exactly 28 PCIe Gen 4 lanes, as confirmed in Microchip's official ordering information table. This lane count is fixed for the part and enables up to 16 configurable ports with flexible bifurcation (×1*/×2/×4/×8/×16). It does not support dynamic lane reallocation beyond the 28-lane total.
Does PM42028B1-F3EI include an integrated processor?
Yes, PM42028B1-F3EI integrates a MIPS-based embedded processor that executes fabric management firmware, handles SR-IOV virtualization, and manages peripheral I/O - eliminating the need for an external CPU in PCIe fabric control applications.
What error containment features are implemented in PM42028B1-F3EI?
PM42028B1-F3EI implements per-port Advanced Error Reporting (AER), Downstream Port Containment (DPC), poisoned TLP blocking, and Completion Timeout Synthesis (CTS). These features collectively isolate faults to individual ports and prevent error propagation to upstream hosts or other endpoints.
Is PM42028B1-F3EI pin-compatible with other PAX Gen 4 switches like PM42036B1-F3EI?
No documented pin-to-pin compatibility exists between PM42028B1-F3EI and PM42036B1-F3EI. While both use the same 29 mm × 29 mm package, Microchip does not publish cross-variant pinout equivalence, and lane/port allocation differences imply distinct ball assignments. PCB layout must be verified per device-specific documentation.
What interfaces does PM42028B1-F3EI support for out-of-band management?
PM42028B1-F3EI supports UART, TWI (SMBus), and 10/100 Ethernet (MII/RMII) for out-of-band management. These interfaces enable configuration, diagnostics, and firmware updates independent of the PCIe fabric, with full access to registers, counters, and debug tools via ChipLink.
PM42028B1-F3EI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- Switchtec
- Package/Case:
- 753-BBGA
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- PCIe Switch
- Interface:
- PCI
- Voltage - Supply:
- -
- Supplier Device Package:
- 753-BBGA (29x29)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PM42028B1-F3EI FAQ
1.How can I place an order for PM42028B1-F3EI through Aetrix?
Please submit a Request for Quotation (RFQ) for PM42028B1-F3EI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PM42028B1-F3EI reliable?
The price and inventory of PM42028B1-F3EI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM42028B1-F3EI is usually 5 days.
3.What payment methods are accepted for PM42028B1-F3EI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM42028B1-F3EI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PM42028B1-F3EI?
PM42028B1-F3EI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PM42028B1-F3EI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PM42028B1-F3EI?
For technical support, including PM42028B1-F3EI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM42028B1-F3EI requirements.
6.How does Aetrix verify that PM42028B1-F3EI is sourced from the original manufacturer or authorized distributors?
All PM42028B1-F3EI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM42028B1-F3EI meets industry standards.
7.What is the process for return or replacement of PM42028B1-F3EI?
All PM42028B1-F3EI units undergo pre-shipment inspection (PSI). If there is an issue with PM42028B1-F3EI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PM42028B1-F3EI part is unused and in its original packaging.
Return procedure for PM42028B1-F3EI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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