Microchip Technology PM42036B1-F3EI
- Part No.:
- PM42036B1-F3EI
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- 753-BBGA
- Datasheet:
-
PM42036B1-F3EI.pdf
- Description:
- PCIE SWITCH GEN4 X36 PAX 753BBGA
- Quantity:
- Payment:

- Shipping:

Inventory:1,435
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Product details
Overview
PM42036B1-F3EI from Microchip Technology is a Gen 4 PCIe fabric switch with 36 lanes, 20 ports, and integrated hot-plug controllers for all ports, enabling multi-host SR-IOV sharing of NVMe SSDs and GPUs in rack-scale architectures.
For engineers reviewing the PM42036B1-F3EI datasheet, PM42036B1-F3EI pinout, PM42036B1-F3EI application, or PM42036B1-F3EI equivalent, key selection criteria include lane count, port bifurcation flexibility (×1*/×2/×4/×8/×16), end-to-end data integrity protection, AER/DPC error containment, and support for in-band PCIe or UART-based fabric management.
Technical Context
The PM42036B1-F3EI implements a non-blocking PCIe Gen 4 switching fabric with 36 bidirectional lanes operating at 16 GT/s, supporting full ×1* to ×16 port bifurcation without upstream/downstream port configuration restrictions. It integrates a MIPS processor for autonomous fabric management and supports secure boot with image authentication.
It delivers advanced error containment including Downstream Port Containment (DPC) on all 20 downstream ports, Poisoned TLP blocking, Completion Timeout Synthesis (CTS), and per-port hot- and surprise-plug controllers. Real-time 2D eye capture and PCIe Gen 4 lane margining are enabled via built-in diagnostics hardware.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Lane Count | 36 PCIe Gen 4 lanes (16 GT/s), enabling up to 114 GBps aggregate bandwidth |
| Port Count | 20 configurable ports, each supporting hot-plug and surprise-plug detection |
| Bifurcation | Flexible ×1*, ×2, ×4, ×8, ×16 per port; no fixed upstream/downstream assignment required |
| Error Handling | Downstream Port Containment (DPC), Advanced Error Reporting (AER), Poisoned TLP blocking, CTS |
| Package | 29 mm × 29 mm BGA with 784 balls, RoHS-compliant, lead-free |
| Integrated Processor | MIPS-based embedded CPU for firmware-driven fabric management without external host CPU |
| Security | Secure boot with SHA-256 signature verification and authenticated firmware image loading |
Pinout & Package
PM42036B1-F3EI is housed in a 29 mm × 29 mm, 784-ball fine-pitch BGA package (ball pitch: 0.8 mm), optimized for high-density server and storage PCB layouts. Pinout information is defined in Microchip's official Switchtec PAX Gen 4 Hardware Design Guide (DS00002987D).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PCIe_RX[0:35], PCIe_TX[0:35] | High-speed differential I/O | 36 bidirectional Gen 4 lanes; each pair supports full-rate 16 GT/s signaling with adaptive equalization |
| CLKREQ#, PERST#, WAKE# | PCIe control signals | Per-port hot-plug coordination, reset assertion, and wake event generation per PCIe specification |
| GPIO[0:102] | Configurable digital I/O | 103 pins usable for cable presence detection, LED control, or custom board-level signaling |
| UART0/1/2/3_TX/RX | Serial debug interface | Four independent UART channels for out-of-band firmware debugging and configuration |
| JTAG_TCK/TMS/TDI/TDO/TRST# | Boundary-scan test interface | IEEE 1149.1-compliant access for silicon validation, programming, and failure analysis |
Key Features
| Feature | Design Value |
|---|---|
| SR-IOV Domain Virtualization | Enables physical and virtual function mapping across shared NVMe SSDs and GPUs, eliminating PCIe tree topology bottlenecks in multi-host systems |
| Autonomous Fabric Management | Integrated MIPS processor executes PAX SDK firmware, removing need for external CPU during SR-IOV endpoint sharing or topology reconfiguration |
| Real-Time Signal Integrity Tools | Built-in PCIe Gen 4 eye capture and lane margining allow on-board SerDes tuning without external test equipment |
| End-to-End Data Protection | ECC on internal RAMs, poisoned TLP blocking, and CRC-32/CRC-16 on TLPs ensure bit-error resilience across full fabric path |
| Multi-Interface Management | Configuration and monitoring supported over in-band PCIe, UART, TWI (SMBus), or 10/100 Ethernet (MII/RMII) |
Applications
| Composable GPU Fabrics | SR-IOV-Enabled JBOFs |
|---|---|
Use Scenario: Dynamic allocation of GPU resources across multiple compute nodes in AI training clusters using disaggregated infrastructure. IC Role / Device Role / Timing Role: PCIe fabric switch managing low-latency, high-bandwidth interconnect between hosts and pooled GPU endpoints. Use Value: Enables GPU time-slicing and live migration via SR-IOV virtual functions while maintaining Gen 4 throughput and deterministic latency. | Use Scenario: Shared NVMe storage pools accessed concurrently by multiple servers in hyperconverged infrastructure. IC Role / Device Role / Timing Role: High-reliability PCIe switch providing isolated, hot-pluggable connectivity to NVMe drives with DPC and AER per port. Use Value: Prevents single-drive failure from propagating to other hosts via Downstream Port Containment and poisoned TLP blocking. |
| Rack-Scale Disaggregation | Multi-Host Accelerator Sharing |
Use Scenario: Physical separation of CPU, memory, and accelerator resources across chassis, interconnected via standardized optical or passive cables. IC Role / Device Role / Timing Role: Gen 4 fabric switch implementing PCIe-compliant link training for SFF-8644/OCuLink cabling with manual PHY configuration support. Use Value: Achieves stable 16 GT/s links over 3+ meter passive cables using real-time eye capture and lane margining tools. | Use Scenario: Sharing FPGA or SmartNIC accelerators among heterogeneous hosts (x86, ARM, RISC-V) in cloud-native edge deployments. IC Role / Device Role / Timing Role: Programmable PCIe switch enabling multifunction endpoint virtualization and secure boot-controlled firmware updates. Use Value: Supports vendor-specific SR-IOV extensions via PAX SDK while enforcing authenticated firmware execution for runtime integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe fabric switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PM42052B1-F3EI | 52-lane, 28-port variant in same 29 mm × 29 mm package; higher lane/port count and larger internal buffer | Suitable for denser JBOF or GPU pool configurations requiring >36 lanes | Select when scaling beyond 36 lanes while retaining identical footprint and thermal profile |
| PM42068B1-FEI | 68-lane, 36-port variant in 40 mm × 40 mm package; adds 10/100 Ethernet MAC and additional TWI/SGPIO interfaces | Required where out-of-band Ethernet management or enhanced enclosure control is needed | Choose when Ethernet-based fabric management or >103 GPIOs/SGPIOs are mandatory |
Compared with PM42052B1-F3EI and PM42068B1-FEI, the PM42036B1-F3EI offers optimal balance of lane density, thermal envelope (29 mm × 29 mm), and cost for mid-scale composable systems-delivering full Gen 4 fabric functionality without over-provisioning lanes or I/O interfaces.
Availability
PM42036B1-F3EI is available at Aetrix Electronics and suitable for scalable multi-host systems, SR-IOV-enabled JBOFs, composable GPU fabrics, and rack-scale architectures requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for PM42036B1-F3EI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, FPGAs, and connectivity solutions, with a focus on reliability, security, and embedded system integration.
The Switchtec PAX Gen 4 family-including PM42036B1-F3EI-is designed for high-availability PCIe fabric applications in data center, AI acceleration, and disaggregated infrastructure, emphasizing autonomous management, error resilience, and SR-IOV virtualization.
FAQ
What is the maximum PCIe Gen 4 bandwidth supported by PM42036B1-F3EI?
The PM42036B1-F3EI supports 36 bidirectional PCIe Gen 4 lanes operating at 16 GT/s, delivering up to 114 GBps aggregate bandwidth (57 GBps per direction). This capacity enables full x16 links to multiple endpoints simultaneously while maintaining non-blocking switching performance across all 20 ports.
Does PM42036B1-F3EI require an external CPU for fabric management?
No, PM42036B1-F3EI integrates a MIPS processor and runs Microchip's PAX SDK firmware autonomously. It performs SR-IOV virtualization, topology configuration, and error handling without external host CPU intervention-reducing system complexity and power consumption in headless fabric deployments.
How does PM42036B1-F3EI handle PCIe link failures or device errors?
PM42036B1-F3EI implements Downstream Port Containment (DPC) on all 20 ports, Advanced Error Reporting (AER), poisoned TLP blocking, and Completion Timeout Synthesis (CTS). These features isolate faulty endpoints, prevent error propagation to upstream hosts, and maintain fabric stability during unplanned device removal or corruption events.
What package type and ball count does PM42036B1-F3EI use?
PM42036B1-F3EI uses a 29 mm × 29 mm, 784-ball fine-pitch BGA package with 0.8 mm ball pitch. This RoHS-compliant, lead-free package supports high-density routing and thermal dissipation requirements typical of enterprise storage and accelerator platforms.
Can PM42036B1-F3EI support optical or active cable interconnects?
Yes, PM42036B1-F3EI supports passive, managed, and optical PCIe-compliant cables via SFF-8644, SFF-8643, OCuLink, and SFF-8639 connectors. Its optional link training and manual PHY configuration modes enable interoperability with third-party optical modules and extended-reach cabling solutions.
PM42036B1-F3EI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- Switchtec
- Package/Case:
- 753-BBGA
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- PCIe Switch
- Interface:
- PCI
- Voltage - Supply:
- -
- Supplier Device Package:
- 753-BBGA (29x29)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
PM42036B1-F3EI FAQ
1.How can I place an order for PM42036B1-F3EI through Aetrix?
Please submit a Request for Quotation (RFQ) for PM42036B1-F3EI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PM42036B1-F3EI reliable?
The price and inventory of PM42036B1-F3EI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM42036B1-F3EI is usually 5 days.
3.What payment methods are accepted for PM42036B1-F3EI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM42036B1-F3EI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PM42036B1-F3EI?
PM42036B1-F3EI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PM42036B1-F3EI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PM42036B1-F3EI?
For technical support, including PM42036B1-F3EI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM42036B1-F3EI requirements.
6.How does Aetrix verify that PM42036B1-F3EI is sourced from the original manufacturer or authorized distributors?
All PM42036B1-F3EI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM42036B1-F3EI meets industry standards.
7.What is the process for return or replacement of PM42036B1-F3EI?
All PM42036B1-F3EI units undergo pre-shipment inspection (PSI). If there is an issue with PM42036B1-F3EI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PM42036B1-F3EI part is unused and in its original packaging.
Return procedure for PM42036B1-F3EI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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