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Microchip Technology PM50036B1-FEI
- Part No.:
- PM50036B1-FEI
- Manufacturer:
- Microchip Technology
- Category:
- Specialized
- Package:
- -
- Datasheet:
-
PM50036B1-FEI.pdf
- Description:
- PFX 36XG5 FANOUT PCIE SWITCH
- Quantity:
- Payment:
- Shipping:
Inventory:4,853
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Product details
Overview
PM50036B1-FEI from Microchip Technology is a Gen 5 PCIe fanout switch IC with 36 lanes, 10 virtual switch partitions, and 20 dedicated hot-plug controllers - deployed in data center servers and industrial workstations to expand PCIe connectivity from a single upstream port to multiple downstream endpoints including NVMe SSDs and accelerators.
For engineers reviewing the PM50036B1-FEI datasheet, PM50036B1-FEI pinout, PM50036B1-FEI application, or PM50036B1-FEI equivalent, key selection criteria include lane count (36), partition support (10), NTB assignment capability, PCIe Gen 5 32 GT/s compliance, and integrated diagnostics for high-availability systems.
Technical Context
The PM50036B1-FEI implements a non-blocking PCIe Gen 5 switch fabric with cut-through DMA engine supporting up to 64 channels and real-time eye capture for signal integrity validation. It integrates a MIPS processor for firmware execution and supports logical non-transparent bridging across all 36 lanes.
Each of its 20 hot-plug controllers manages independent surprise- and hot-plug events per downstream port, while Advanced Error Reporting (AER) and Downstream Port Containment (DPC) operate on all ports to isolate faults without host intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| PCIe Generation | Gen 5 (32 GT/s) - enables full bandwidth for NVMe Gen 5 SSDs and AI accelerators |
| Lane Count | 36 lanes - provides scalable fanout from x16 upstream to multiple x2/x4/x8 downstream links |
| Virtual Partitions | 10 partitions - isolates traffic domains for multi-tenant server or secure I/O virtualization |
| Hot-Plug Controllers | 20 controllers - supports hot-swap of up to 20 downstream devices without system reset |
| NT Bridges | Up to 48 assignable NTBs - enables non-transparent interconnect between isolated PCIe domains |
| Error Containment | DPC + AER + CTS - prevents error propagation and ensures upstream host remains operational during downstream failures |
| Integrated Processor | MIPS core - executes embedded firmware for configuration, diagnostics, and security boot authentication |
Pinout & Package
PM50036B1-FEI is housed in a 27 mm × 27 mm, 780-pin FC-BGA package with thermal lid and edge-plated contacts for high-speed signal integrity. Pin definitions follow Microchip's Switchtec PFX Gen 5 standard layout, with dedicated differential pairs for PCIe Gen 5 lanes, sideband management interfaces (TWI, UART, JTAG/EJTAG), and GPIO banks configurable for SGPIO or cable detection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LANEx_y+ | PCIe Gen 5 differential transmit | Drives 32 GT/s signals to downstream devices; requires controlled impedance routing |
| LANEx_y− | PCIe Gen 5 differential receive | Receives 32 GT/s signals; supports link training and manual PHY tuning |
| HOTPLUG_n | Hot-plug controller enable | Asserted per-port to initiate surprise/hot-plug sequence and manage power sequencing |
| SGPIO_CLK/SDATA | SGPIO bus interface | Supports SFF-8485-compliant LED/status signaling for slot management |
| JTAG_TCK/TMS/TDO/TDI | Boundary scan and debug interface | Enables in-circuit programming, firmware update, and silicon-level diagnostics |
| VDD_0V85/VDD_1V8 | Core and I/O power supplies | Requires separate low-noise regulation; VDD_0V85 powers SERDES, VDD_1V8 powers logic and GPIO |
Key Features
| Feature | Design Value |
|---|---|
| Non-blocking Gen 5 fabric | Guarantees full 36-lane throughput without internal arbitration bottlenecks |
| Real-time eye capture | On-die SERDES monitoring enables live signal integrity analysis without external equipment |
| End-to-end data integrity | ECC protection on internal RAMs and CRC coverage across TLPs prevent silent data corruption |
| Secure boot authentication | Verifies signed firmware images before execution to block unauthorized code injection |
| Comprehensive diagnostics | Integrated counters for TLP latency, errors, and performance metrics accessible via ChipLink GUI |
Applications
| Data Center Server Expansion | Industrial Workstation I/O Aggregation |
|---|---|
Use Scenario: Adding NVMe SSDs and GPU accelerators to a dual-socket server with limited PCIe root ports. IC Role / Device Role / Timing Role: PCIe fanout switch managing lane allocation, hot-plug coordination, and NTB-based domain isolation. Use Value: Enables 36-lane fanout from one x16 upstream port to eight x4 NVMe drives while maintaining independent power and thermal control per device. | Use Scenario: Consolidating high-bandwidth video capture cards, FPGA co-processors, and storage controllers in broadcast production hardware. IC Role / Device Role / Timing Role: Gen 5 switch providing deterministic low-latency routing and real-time eye monitoring for signal-critical workflows. Use Value: Eliminates external retimers and reduces BOM cost by integrating SERDES diagnostics and cut-through DMA in a single IC. |
| Defense-Grade Rugged Computing | 5G Radio Unit Interconnect |
Use Scenario: Deploying fault-tolerant PCIe expansion in airborne or vehicle-mounted mission computers requiring MIL-STD-810H compliance. IC Role / Device Role / Timing Role: High-reliability switch implementing DPC, AER, and 1+1 failover for uninterrupted operation under shock/vibration. Use Value: Maintains PCIe link integrity during transient faults and enables field-upgradable firmware via authenticated boot path. | Use Scenario: Connecting distributed unit (DU) baseband processors to fronthaul interface cards and timing synchronization modules in Open RAN infrastructure. IC Role / Device Role / Timing Role: Fanout switch enabling time-sensitive networking over PCIe with precise timestamp forwarding and jitter-controlled clock distribution. Use Value: Supports deterministic latency <100 ns for CPRI/eCPRI packet forwarding and aligns with IEEE 1588 PTP timing requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PCIe fanout switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PM50036B1-FEI-TR | Tape-and-reel packaging variant; identical electrical specs and pinout | No functional difference - intended for automated SMT assembly only | Select PM50036B1-FEI-TR for volume production; use PM50036B1-FEI for prototyping or small-batch builds |
| PM51036B1-FEI | PSX variant with enhanced SERDES calibration and extended temperature range (−40°C to +105°C) | Better suited for outdoor telecom or harsh-environment deployments where thermal margin is critical | Choose PM51036B1-FEI when operating beyond 85°C junction or requiring tighter jitter tolerance in optical fronthaul links |
Compared with PM50036B1-FEI, the PM50036B1-FEI-TR offers identical functionality in tape-and-reel format for SMT lines, while PM51036B1-FEI delivers higher thermal resilience and refined SERDES stability - making it preferable for telecom infrastructure where ambient extremes and long-term reliability dominate design priorities.
Availability
PM50036B1-FEI is available at Aetrix Electronics and suitable for data center server expansion, industrial workstation I/O aggregation, defense-grade rugged computing, and 5G radio unit interconnect requiring stable component supply across multi-year production cycles.
Supply support for PM50036B1-FEI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, FPGAs, and connectivity solutions with emphasis on reliability and long-term product availability.
The Switchtec PFX family targets high-availability PCIe expansion in enterprise, defense, and telecom infrastructure - designed to replace discrete bridge chips and reduce system-level complexity through integrated diagnostics, security, and hot-plug control.
FAQ
What PCIe generation and data rate does the PM50036B1-FEI support?
The PM50036B1-FEI supports PCIe Gen 5 with a data rate of 32 GT/s per lane. It maintains backward compatibility with Gen 4 and Gen 3 devices through automatic link training. This enables full utilization of Gen 5 NVMe SSDs and AI accelerators while preserving interoperability with legacy peripherals in mixed-generation systems.
How many virtual switch partitions does the PM50036B1-FEI support?
The PM50036B1-FEI supports 10 virtual switch partitions. Each partition operates as an independent PCIe hierarchy with isolated configuration space, memory-mapped I/O windows, and dedicated error reporting - enabling secure multi-tenancy in cloud servers and deterministic resource allocation in real-time industrial systems.
Does the PM50036B1-FEI include built-in diagnostics capabilities?
Yes, the PM50036B1-FEI includes real-time eye capture, external loopback mode, and comprehensive counters for TLP latency, errors, and performance metrics. These features are accessible via Microchip's ChipLink diagnostic tool over in-band PCIe or sideband interfaces like UART and JTAG, eliminating need for external test equipment during bring-up and field maintenance.
What is the role of the integrated MIPS processor in the PM50036B1-FEI?
The integrated MIPS processor in the PM50036B1-FEI executes embedded firmware for switch initialization, hot-plug state machine management, security boot authentication, and runtime diagnostics. It operates independently of the host CPU, enabling autonomous fault recovery and secure firmware updates without host OS dependency.
Is the PM50036B1-FEI compatible with SFF-8643 and OCuLink connectors?
Yes, the PM50036B1-FEI supports SFF-8643, OCuLink, SFF-8644, and SFF-8639 connectors through its PCIe Gen 5 PHY layer and configurable GPIOs. Its SERDES complies with PCIe specification for passive, managed, and optical cable implementations - allowing direct integration into modular chassis and high-density front-panel I/O designs.
PM50036B1-FEI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- Switchtec
- Package/Case:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- Fanout PCIe Switch
- Interface:
- 2-Wire, GMII, GPIO, JTAG, PCIe, RMII, UART
- Voltage - Supply:
- -
- Supplier Device Package:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
PM50036B1-FEI FAQ
1.How can I place an order for PM50036B1-FEI through Aetrix?
Please submit a Request for Quotation (RFQ) for PM50036B1-FEI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PM50036B1-FEI reliable?
The price and inventory of PM50036B1-FEI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM50036B1-FEI is usually 5 days.
3.What payment methods are accepted for PM50036B1-FEI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM50036B1-FEI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PM50036B1-FEI?
PM50036B1-FEI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PM50036B1-FEI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PM50036B1-FEI?
For technical support, including PM50036B1-FEI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM50036B1-FEI requirements.
6.How does Aetrix verify that PM50036B1-FEI is sourced from the original manufacturer or authorized distributors?
All PM50036B1-FEI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM50036B1-FEI meets industry standards.
7.What is the process for return or replacement of PM50036B1-FEI?
All PM50036B1-FEI units undergo pre-shipment inspection (PSI). If there is an issue with PM50036B1-FEI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PM50036B1-FEI part is unused and in its original packaging.
Return procedure for PM50036B1-FEI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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