STMicroelectronics PM6644TR

Overview

PM6644TR from STMicroelectronics is a 350 mA valley current limit, adjustable step-down DC-DC regulator in DFN10 (3×3 mm) package, supporting 0.9–8 V output (or fixed 3.47 V), 4.5–25 V input, and programmable 200–600 kHz switching frequency via external resistor. It integrates a high-accuracy 3.3 V linear reference (REF3) and operates with constant-on-time (COT) control for fast transient response - used in microcontroller core supplies and portable industrial power rails.

For engineers reviewing the PM6644TR datasheet, PM6644TR pinout, PM6644TR application, or PM6644TR equivalent, key selection criteria include its dual-mode FB configuration (fixed vs. adjustable), latched OVP/UVP fault protection, COT-based light-load efficiency in pulse-skipping mode, and co-integrated REF3 reference for auxiliary biasing in compact power systems.

Technical Context

The PM6644TR implements a constant-on-time (COT) control architecture with embedded voltage feed-forward, enabling near-constant switching frequency across line/load variations and sub-1 µs load transient recovery. Its valley current limit is fixed at 350 mA, and it features independent EN logic for sequencing both the buck regulator and internal 3.3 V REF3 reference.

Switching operation supports two output configurations: FB tied to VCC yields fixed 3.47 V output; FB connected via resistive divider enables 0.9–8 V adjustment. Frequency is set by resistor between TON and VIN (200–600 kHz), while BYP pin controls VCC sourcing-either from integrated 3.8 V generator (BYP < 2.4 V) or direct BYP pass-through (BYP > 3.2 V).

Key Specifications

Pinout & Package

PM6644TR is housed in a thermally enhanced DFN10 (3 mm × 3 mm, 0.75 mm height) package with exposed thermal pad. Pin 1 is marked by dot; pin numbering follows standard counter-clockwise layout starting from top-left corner when marking side faces up.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar step-down regulator with integrated reference applications.

Compared with TPS62840DRVR and MP2451DT-LF-Z, PM6644TR uniquely combines adjustable output (0.9–8 V), latched fault protection, and a dedicated 3.3 V REF3 reference in a single DFN10 package - enabling compact, self-contained power solutions for mixed-signal microcontroller systems without external support ICs.

Availability

PM6644TR is available at Aetrix Electronics and suitable for networking power supply, portable applications, microcontroller supply, and industrial supply requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for PM6644TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, microcontrollers, and analog ICs for industrial, automotive, and consumer markets.

The PM6644TR belongs to ST's high-efficiency, small-footprint DC-DC regulator product line, designed specifically for space-constrained embedded systems needing integrated reference capability and robust fault management.

FAQ

What is the recommended layout practice for the PM6644TR's exposed thermal pad?

The exposed pad (EXP PAD) must be soldered to a solid copper thermal plane on the PCB, connected to GND with ≥4 thermal vias (0.3 mm diameter, spaced ≤1 mm apart). This ensures junction-to-board thermal resistance remains ≤25 °C/W, enabling full 350 mA current capability at 70 °C ambient per ST's validated layout guidelines.

Can the PM6644TR operate with FB left floating?

No - FB must be either tied directly to VCC (for fixed 3.47 V output) or connected to an external resistor divider from VOUT to GND (for adjustable 0.9–8 V output). A floating FB pin causes undefined regulation behavior and may trigger latched UVP due to comparator input drift; ST explicitly prohibits unconnected FB in Section 1.1 of the datasheet.

How does the BYP pin affect VCC sourcing and system startup timing?

When BYP < 2.4 V, VCC is generated internally at ~3.8 V from VIN; when BYP > 3.2 V, VCC is directly passed from BYP through a MOSFET switch. Startup delay occurs only if BYP ramps slowly - the BYP rising threshold (2.9–3.2 V) must be reached before VCC stabilizes, ensuring REF3 and controller enable synchronously. External BYP capacitor (10–100 nF) controls this ramp rate.

Is the REF3 output capable of driving a 10-bit ADC reference input?

Yes - REF3 delivers 3.3 V ±0.1 V with 500 µV load regulation (0–2 mA) and 2.3–6.3 mV/V line regulation. At typical 10-bit ADC reference current draw (<100 µA), output deviation is <1 LSB (3.22 mV) under worst-case conditions, satisfying accuracy requirements for precision measurement without additional buffering.