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STMicroelectronics PM8903

Part No.:
PM8903
Manufacturer:
STMicroelectronics
Category:
Voltage Regulators - DC DC Switching Regulators
Package:
16-VFQFN Exposed Pad
Datasheet:
AetrixPM8903.pdf
Description:
IC REG BUCK ADJ 3A 16VFQFPN
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,593

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Product details

Overview

PM8903 from STMicroelectronics is a monolithic synchronous step-down DC-DC regulator delivering up to 3 A continuous output current, operating from 2.8 V to 6 V input voltage (VIN), with adjustable output down to 0.6 V, ±1% output voltage accuracy, and 1.1 MHz switching frequency. It integrates dual 35 mΩ nMOS power switches and supports interleaving synchronization for CPU/FPGA subsystem power rails.

For engineers reviewing the PM8903 datasheet, PM8903 pinout, PM8903 application, or PM8903 equivalent, key selection criteria include its thermally compensated loss-less current sense, PSKIP light-load efficiency mode, embedded bootstrap diode, Power Good output, and VFQFPN16 3 × 3 mm compact package for space-constrained VRMs.

Technical Context

The PM8903 implements voltage-mode control with an external compensation network (COMP/FB), enabling wide filter flexibility including all-MLCC designs. Its high-bandwidth error amplifier (120 dB DC gain, 14 MHz GBWP) ensures fast transient response under dynamic load conditions typical in DSP and FPGA core supplies.

It features dual-threshold overcurrent protection (IOC1 = 4.6 A typ., IOC2 = 5.2 A typ.), thermally compensated sensing across HS/LS MOSFETs, and precise OVP/UVP thresholds referenced to the 0.6 V internal bandgap (OVP = 0.72 V, UVP = 0.48 V), ensuring robust fault handling without external components.

Key Specifications

Parameter Value and Actual Design Meaning
Output Current 3 A continuous - supports full-core operation of mid-tier CPUs and FPGAs without external current sharing.
Input Voltage Range 2.8 V to 6 V - compatible with single-cell Li-ion, USB PD, and intermediate bus architectures.
Output Voltage Accuracy ±1% over line/load/temperature - enables tight regulation for <1 V core rails without post-regulation trimming.
Switching Frequency 1.1 MHz (typ.) - allows use of small, low-profile inductors (e.g., 1–2.2 µH) and reduces EMI fundamental frequency.
HS/LS RDS(on) 35 mΩ each - minimizes conduction loss at 3 A, enabling >90% peak efficiency at medium loads.
Quiescent Current <15 µA in shutdown - critical for battery-backed subsystems requiring ultra-low standby leakage.
Protection Features OVP/UVP/OC/OTP with latched behavior - eliminates need for external supervisors in safety-critical power domains.

Pinout & Package

PM8903 is housed in a VFQFPN16 3 × 3 mm package with exposed thermal pad, optimized for high-power density and thermal dissipation on compact PCBs.

Pin/Terminal Circuit Role Design Meaning
EN Enable control input Active-high logic input with 1.5 V threshold; internal 5 µA pull-up enables simple resistor-based sequencing or microcontroller control.
SYNCH Synchronization I/O Configurable master/slave interface for 180° interleaved operation-reduces input RMS current and eases input capacitor sizing.
PGOOD Open-drain status output Signals valid regulation after soft-start; pulls low on OVP/UVP/OC/OTP-enables system-level power sequencing and fault logging.
BOOT Bootstrap supply node Connects via 0.1 µF ceramic to PHASE; powers high-side gate driver-integrated active bootstrap diode eliminates external component.
PHASE (pins 5–7) Power switch node Direct connection point for output inductor; ties HS source and LS drain-low-inductance layout critical for EMI and efficiency.
PSKIP/MS Multi-function configuration pin Resistor-to-GND sets PSKIP enable/disable, master/slave role, and switching frequency (0.8/1.0/1.1 MHz)-no external clock required.
FB Feedback input Inverting input of error amplifier; senses output via resistive divider-100 nA internal bias prevents floating-fault runaway.
COMP Compensation node Error amplifier output; connects external RC//C network-enables loop stabilization across wide output capacitor ESR ranges.
VIN (pins 13–14) Main power input High-current path to HS drain; requires local ≥10 µF MLCC bypass to PGND-minimizes input ripple and improves transient response.
VCC Signal supply Independent 2.9–5.5 V rail powers control circuitry-decoupling with ≥1 µF MLCC isolates analog section from power noise.
GND / PGND (pins 11, 15–16) Analog & power ground Separate GND (signal reference) and PGND (power return) pins reduce noise coupling-thermal pad must connect to PGND plane.

Key Features

Feature Design Value
Integrated 35 mΩ HS/LS MOSFETs Eliminates external power switches and gate drivers-reduces BOM count and layout area while maintaining >90% efficiency at 3 A.
Thermally compensated current sense Removes need for external sense resistors or temperature calibration-ensures consistent OCP trip points across –25°C to +125°C junction range.
Internal soft-start & soft-stop Linear 0.79 ms reference ramp prevents inrush current; latched soft-off with 100 Ω bleeding resistor safely discharges pre-biased outputs.
Pulse-skipping (PSKIP) mode Dynamically disables switching pulses at light load-boosts efficiency to >85% at 10 mA while maintaining regulated output voltage.
Interleaving synchronization Enables two PM8903s to operate 180° out-of-phase-halves input capacitor RMS current, allowing smaller, lower-cost bulk capacitance.

Applications

Mobile Application Processor Core Rail FPGA I/O Bank Supply

Use Scenario: Powering ARM Cortex-A series cores in smartphones and tablets requiring dynamically scaled 0.8–1.2 V rails with fast load transients.

IC Role / Device Role / Timing Role: Primary synchronous buck regulator delivering 3 A peak current with <10 µs transient response via voltage-mode loop and external compensation.

Use Value: ±1% output accuracy and integrated current sense ensure stable core operation across P-state transitions without external trimming or monitoring.

Use Scenario: Supplying configurable 1.2–3.3 V I/O banks in Xilinx Artix-7 or Intel Cyclone V FPGAs with independent voltage domains.

IC Role / Device Role / Timing Role: Adjustable buck converter with PSKIP mode maintaining regulation during low-activity I/O states while minimizing quiescent loss.

Use Value: VFQFPN16 3 × 3 mm footprint and 1.1 MHz switching allow dense multi-rail layouts without compromising thermal performance.

Industrial PLC Digital I/O Module Automotive Infotainment SoC Subsystem

Use Scenario: Providing isolated 3.3 V or 5 V auxiliary rails for digital isolators, ADCs, and CAN transceivers in DIN-rail mounted controllers.

IC Role / Device Role / Timing Role: Robust buck regulator with OVP/UVP/OTP latched protection-ensures fail-safe shutdown during brownouts or short-circuit events.

Use Value: Shutdown current <15 µA extends backup battery life; PGOOD output interfaces directly with PLC watchdog timers for system-level diagnostics.

Use Scenario: Generating 1.1 V core and 1.8 V memory rails for Qualcomm Snapdragon Automotive or NXP i.MX8 SoCs in head units.

IC Role / Device Role / Timing Role: Synchronous buck with interleaving support-reduces conducted EMI in noisy automotive environments while meeting CISPR-25 Class 5 limits.

Use Value: Dual-level OCP (4.6 A / 5.2 A) and thermal shutdown at 140°C provide ASIL-B–compatible fault coverage without external ICs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar synchronous step-down regulator applications.

Alternative Part Technical Difference Application Difference Selection Advice
Texas Instruments TPS54332 3 A, 3.5–28 V input, 570 kHz fixed frequency, no integrated bootstrap diode, requires external BOOT diode. Higher VIN range suits 12 V intermediate bus; lacks PSKIP and interleaving-less efficient at light loads and unsuitable for dual-phase scaling. Select when input exceeds 6 V or when legacy 570 kHz EMI profile is required; avoid for space-constrained 3.3 V–5 V systems.
Analog Devices ADP2370 3 A, 3.0–20 V input, 1.2 MHz, integrated BOOT diode, but only 0.8% output accuracy and no PGOOD output. No Power Good signal complicates system sequencing; ±0.8% accuracy insufficient for sub-1 V core rails demanding ±1% tolerance. Use where cost is primary constraint and PGOOD/status signaling is unnecessary; not recommended for processor core supplies.

Compared with TPS54332 and ADP2370, PM8903 uniquely combines 1.1 MHz operation, ±1% accuracy, integrated bootstrap diode, PGOOD, and interleaving-making it optimal for compact, high-reliability 3 A buck designs below 6 V input.

Availability

PM8903 is available at Aetrix Electronics and suitable for mobile processor core rails, FPGA I/O banks, industrial PLC modules, and automotive infotainment subsystems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for PM8903 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, power, MCU, and sensor solutions for industrial, automotive, and consumer markets.

The PM8903 belongs to ST's high-efficiency monolithic DC-DC regulator product line, engineered specifically for space-constrained, high-current subsystem power delivery in portable and embedded computing platforms.

FAQ

What is the minimum output voltage achievable with PM8903?

The PM8903 supports adjustable output voltages down to 0.6 V, set by the internal precision 0.6 V reference and external FB resistive divider. This enables direct regulation of modern low-voltage processor cores (e.g., 0.8 V ARM Cortex-A, 0.9 V FPGA fabric) without post-regulation stages. The ±1% accuracy holds across temperature, line, and load variations per datasheet Table 6.

Does PM8903 require an external bootstrap diode?

No. The PM8903 integrates an active bootstrap diode, eliminating the need for an external component between BOOT and PHASE. As confirmed in Section 5.1 and Figure 1 of the datasheet, connecting a 0.1 µF ceramic capacitor from BOOT to PHASE is sufficient-adding an external diode would impair functionality and violate layout guidelines.

How does the PSKIP/MS pin configure switching frequency?

The PSKIP/MS pin selects switching frequency via resistor value: 0 Ω (shorted) = 0.8 MHz, 24 kΩ = 1.0 MHz, 180 kΩ or 240 kΩ = 1.1 MHz (typ.), and floating = 1.1 MHz. This same pin also enables/disables pulse-skipping and defines master/slave status for synchronization-no additional configuration pins are needed.

What happens during output pre-bias startup?

The PM8903 implements low-side-less startup: the LS MOSFET remains disabled until the first PWM pulse occurs, preventing negative voltage spikes when powering into a pre-biased rail. If the output is already above regulation, LS turns on only after soft-start completes-allowing controlled discharge without damaging downstream circuitry.

PM8903 Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
16-VFQFN Exposed Pad
Packaging:
Tube
Product Status:
Obsolete
Function:
Step-Down
Output Configuration:
Positive
Topology:
Buck
Output Type:
Adjustable
Number of Outputs:
1
Voltage - Input (Min):
2.8V
Voltage - Input (Max):
6V
Voltage - Output (Min/Fixed):
0.6V
Voltage - Output (Max):
6V
Current - Output:
3A
Frequency - Switching:
1.1MHz
Synchronous Rectifier:
Yes
Operating Temperature:
-25°C ~ 125°C (TJ)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
16-VFQFPN (3x3)

PM8903 FAQ

1.How can I place an order for PM8903 through Aetrix?

Please submit a Request for Quotation (RFQ) for PM8903 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PM8903 reliable?

The price and inventory of PM8903 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM8903 is usually 5 days.

3.What payment methods are accepted for PM8903?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM8903 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PM8903?

PM8903 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PM8903 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PM8903?

For technical support, including PM8903 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM8903 requirements.

6.How does Aetrix verify that PM8903 is sourced from the original manufacturer or authorized distributors?

All PM8903 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM8903 meets industry standards.

7.What is the process for return or replacement of PM8903?

All PM8903 units undergo pre-shipment inspection (PSI). If there is an issue with PM8903, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PM8903 part is unused and in its original packaging.

Return procedure for PM8903:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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