Microchip Technology PS10NG-G-M905
- Part No.:
- PS10NG-G-M905
- Manufacturer:
- Microchip Technology
- Category:
- Power Supply Controllers, Monitors
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
PS10NG-G-M905.pdf
- Description:
- IC PWM CONTROLLER 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
PS10NG-G-M905 from Supertex Inc. is a quad high-voltage power supply sequencing controller with ±10V to ±90V operation, four independently programmable open-drain PWRGD outputs (PWRGD-A to PWRGD-D), and integrated UV/OV supervision. It sequences DC/DC converter enables in telecom -48V systems, FPGA tracking supplies, and industrial high-voltage subsystems.
For engineers reviewing the PS10NG-G-M905 datasheet, PS10NG-G-M905 pinout, PS10NG-G-M905 application, or PS10NG-G-M905 equivalent, key selection criteria include its 14-lead SOIC package, 5.0–200ms programmable inter-PWRGD delays, ±90V input rail tolerance, 0.4mA supply current, and direct high-voltage interface without optocouplers or level shifters.
Technical Context
The PS10NG-G-M905 integrates four cascaded programmable timers driven by a 10µA RAMP current source and resistor-controlled triangular-wave oscillators at TB/TC/TD pins. Each PWRGD output transitions only after its predecessor and a user-defined delay, enabling precise multi-rail startup coordination.
Its UV/OV comparators feature 1.12V/1.22V thresholds with 100mV hysteresis referenced to VEE, supporting programmable shutdown limits (e.g., UV off at 37V, OV off at 57.8V) via external resistor dividers. A POR interval is set by CRAMP capacitance, and all PWRGD flags deactivate immediately upon UV/OV violation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | ±10V to ±90V across VIN–VEE: supports direct connection to telecom -48V, industrial -24V, and +48V storage rails without voltage division. |
| PWRGD Output Voltage Rating | 90V breakdown: allows direct interfacing with high-side enable inputs of DC/DC converters up to 90V above VEE. |
| Inter-Output Delay Range | 5.0ms to 200ms between PWRGD-A/B/C/D: set via RTB/RTC/RTD resistors (2.9kΩ–117kΩ), enabling fine-grained sequencing control. |
| UV/OV Threshold Accuracy | ±50mV hysteresis around 1.17V nominal: ensures stable detection window for input rail monitoring under varying temperature and noise. |
| Supply Current | 400µA typical at -48V: minimizes loading on high-voltage bias rails while maintaining full supervision and timing functionality. |
| RAMP Pin Current | 10µA constant current: provides linear ramp generation for POR timing, enabling predictable tPWRGD-A = CRAMP × (10V − 1.17V)/10µA. |
Pinout & Package
The PS10NG-G-M905 is housed in a 14-lead narrow-body SOIC package (8.65 × 3.90 mm, 1.27 mm pitch), RoHS-compliant and marked "PS10NG" on top.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 | PWRGD-D, PWRGD-C, PWRGD-B, PWRGD-A | Open-drain outputs active-high (Hi-Z when ready); each requires external pull-up ≤90V above VEE to drive DC/DC EN pins. |
| 5, 6 | OV, UV | Voltage sense inputs referenced to VEE; thresholds fixed at 1.12V/1.22V; used with resistor dividers to set system UV/OV shutdown points. |
| 7, 14 | VEE, VIN | High-voltage supply terminals: VIN withstands up to +90V relative to VEE; supports direct connection across -90V to -10V or +10V to +90V rails. |
| 8, 9 | NC | No-connect pins; may be left floating or grounded per layout requirements-no internal connection. |
| 10 | RAMP | Constant-current (10µA) output for external capacitor timing; sets initial POR delay before PWRGD-A activation. |
| 11, 12, 13 | TB, TC, TD | Resistor-programmable delay nodes: each connects to VEE via RTx to define time between successive PWRGD transitions (A→B, B→C, C→D). |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent PWRGD sequencing | Four open-drain outputs activated in strict order (A→B→C→D) with individually adjustable delays-eliminates need for discrete timing RC networks or multiple controllers. |
| Integrated UV/OV supervision | Dual comparators with 100mV hysteresis monitor input rail health continuously; immediate PWRGD deactivation on threshold breach ensures fail-safe power management. |
| High-voltage direct interface | Junction-isolated process enables VIN–VEE operation up to ±90V-removes optocouplers, level shifters, and voltage dividers required by low-voltage sequencers. |
| Low quiescent current | 400µA supply current at -48V reduces standby power loss and thermal load in dense telecom and industrial backplanes. |
| Programmable POR & inter-flag delays | CRAMP capacitor sets tPWRGD-A; RTB/RTC/RTD resistors scale tA→B, tB→C, tC→D linearly-enables repeatable, production-tunable sequencing windows. |
Applications
| Telecom -48V Power Sequencing | FPGA/Microprocessor Supply Tracking |
|---|---|
Use Scenario: Sequencing multiple DC/DC converters powering line cards in carrier-grade optical transport equipment. IC Role / Device Role / Timing Role: PS10NG-G-M905 acts as centralized high-voltage sequencer, generating timed PWRGD signals to enable converters in voltage-ramp order (e.g., core → I/O → auxiliary). Use Value: Ensures safe startup of -48V distributed systems by preventing reverse current flow and latch-up during rail ramp-up, with no external isolation components. | Use Scenario: Coordinating power-on of FPGA core, I/O bank, and transceiver supplies requiring tight voltage-tracking relationships. IC Role / Device Role / Timing Role: PS10NG-G-M905 serves as tracking controller, using Schottky diode-assisted feedback paths and programmable delays to align rail rise times within ±10ms. Use Value: Achieves reliable FPGA configuration by enforcing correct voltage sequencing order and timing margins, eliminating boot failures due to out-of-spec power-up transients. |
| Industrial High-Voltage MEMS Drivers | +48V Energy Storage Systems |
Use Scenario: Managing startup of dual-polarity high-voltage drivers for electrostatic MEMS mirrors in laser scanning modules. IC Role / Device Role / Timing Role: PS10NG-G-M905 coordinates sequencing of ±40V analog driver rails and digital logic supplies, ensuring analog bias settles before digital enable. Use Value: Prevents MEMS actuator damage by enforcing strict voltage monotonicity and avoiding partial-enable states during power-up. | Use Scenario: Enabling battery management ICs, DC-DC stages, and communication interfaces in modular lithium-ion energy storage racks. IC Role / Device Role / Timing Role: PS10NG-G-M905 functions as system-level sequencer, asserting PWRGD flags only after main +48V bus stabilizes within UV/OV window and safety checks pass. Use Value: Guarantees BMS firmware initialization occurs only when primary power is valid, reducing risk of brownout-induced data corruption or cell imbalance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quad high-voltage power sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX16054EEE+ | 36V max VIN–VEE rating; 4-channel, but lacks integrated UV/OV supervision-requires external comparators and references. | Suitable for lower-voltage industrial systems (<36V), not direct replacement in -48V telecom or ±90V MEMS applications. | Select MAX16054EEE+ only if system rail voltage stays ≤36V and external supervision circuitry is acceptable. |
| TPS3808G33DBVR | Single-channel supervisor with fixed 3.3V reset; no sequencing capability, no high-voltage tolerance, no PWRGD delay programming. | Applicable only for basic microcontroller reset generation-not a functional alternative for quad sequencing or high-voltage use cases. | TPS3808G33DBVR is not a substitute for PS10NG-G-M905; use only for simple low-voltage reset needs. |
Compared with MAX16054EEE+ and TPS3808G33DBVR, the PS10NG-G-M905 uniquely combines ±90V operation, integrated UV/OV supervision, and four programmable PWRGD outputs in one SOIC package-enabling single-chip sequencing where alternatives require multiple ICs or cannot tolerate telecom-grade voltages.
Availability
PS10NG-G-M905 is available at Aetrix Electronics and suitable for telecom infrastructure, FPGA-based embedded systems, industrial high-voltage MEMS drivers, and +48V energy storage systems requiring stable component supply and long-term design-in support.
Supply support for PS10NG-G-M905 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Supertex Inc. was a U.S.-based semiconductor company specializing in high-voltage analog and power management ICs, acquired by Microchip Technology in 2014.
The PS10NG-G-M905 belongs to Supertex's high-voltage power sequencing product line, designed specifically for telecom, industrial, and test equipment requiring robust, isolated sequencing of multiple high-voltage rails without external level-shifting components.
FAQ
What is the maximum voltage difference the PS10NG-G-M905 can withstand between VIN and VEE?
The PS10NG-G-M905 supports a maximum voltage difference of ±90V between VIN and VEE, as confirmed by its Absolute Maximum Rating of VEE referenced to VIN pin at +0.3V to –100V and VPWRGD referenced to VEE at –0.3V to +100V. This enables direct connection across standard telecom –48V, industrial –24V, and +48V storage rails without external attenuation or isolation. The PS10NG-G-M905 leverages junction-isolated process technology to achieve this rating reliably.
How are the delays between PWRGD-A, PWRGD-B, PWRGD-C, and PWRGD-D programmed on the PS10NG-G-M905?
Delays between PWRGD outputs are set using external resistors: RTB between TB and VEE controls tA→B, RTC between TC and VEE controls tB→C, and RTD between TD and VEE controls tC→D. Each resistor value determines oscillator charge/discharge current (ICD = 1.17V/(4 × RTX)), scaling delay linearly from 5.0ms (RTX = 2.925kΩ) to 200ms (RTX = 117kΩ). The PS10NG-G-M905 datasheet provides exact equations and example calculations for precise tuning.
Does the PS10NG-G-M905 include built-in under-voltage and over-voltage supervision?
Yes, the PS10NG-G-M905 integrates dedicated UV and OV comparators with 1.12V/1.22V thresholds and 100mV hysteresis, both referenced to VEE. These supervise the input rail continuously; violation causes immediate PWRGD deactivation and RAMP discharge. Thresholds are set externally via resistor dividers on pins 5 (OV) and 6 (UV), allowing programmable shutdown points such as UV off at 37V and OV off at 57.8V. This supervision is intrinsic to the PS10NG-G-M905's architecture.
Can the PS10NG-G-M905 be used with positive high-voltage rails like +48V?
Yes, the PS10NG-G-M905 supports both positive and negative high-voltage configurations: VIN may be +10V to +90V relative to VEE (e.g., +48V system with VEE = GND), or VEE may be –10V to –90V relative to VIN (e.g., –48V system with VIN = GND). Its symmetrical ±90V rating and open-drain PWRGD outputs referenced to VEE make it equally suitable for +48V energy storage systems and –48V telecom backplanes. The PS10NG-G-M905's pinout and electrical specs accommodate either polarity without modification.
What package type and compliance does the PS10NG-G-M905 use?
The PS10NG-G-M905 is supplied in a 14-lead narrow-body SOIC package (8.65 × 3.90 mm, 1.27 mm pitch), RoHS-compliant and marked "PS10NG" on top. The "-G" suffix in the part number explicitly denotes green (lead-free) packaging, and "M905" indicates tape-and-reel packaging (2500 units/reel). This package is industry-standard, compatible with automated SMT assembly, and validated for operation from –40°C to +85°C ambient temperature.
PS10NG-G-M905 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Power Supply Sequencer
- Voltage - Input:
- -
- Voltage - Supply:
- -90V ~ -10V
- Current - Supply:
- 400 µA
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
PS10NG-G-M905 FAQ
1.How can I place an order for PS10NG-G-M905 through Aetrix?
Please submit a Request for Quotation (RFQ) for PS10NG-G-M905 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PS10NG-G-M905 reliable?
The price and inventory of PS10NG-G-M905 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PS10NG-G-M905 is usually 5 days.
3.What payment methods are accepted for PS10NG-G-M905?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PS10NG-G-M905 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PS10NG-G-M905?
PS10NG-G-M905 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PS10NG-G-M905 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PS10NG-G-M905?
For technical support, including PS10NG-G-M905 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PS10NG-G-M905 requirements.
6.How does Aetrix verify that PS10NG-G-M905 is sourced from the original manufacturer or authorized distributors?
All PS10NG-G-M905 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PS10NG-G-M905 meets industry standards.
7.What is the process for return or replacement of PS10NG-G-M905?
All PS10NG-G-M905 units undergo pre-shipment inspection (PSI). If there is an issue with PS10NG-G-M905, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PS10NG-G-M905 part is unused and in its original packaging.
Return procedure for PS10NG-G-M905:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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