Renesas PS9905-Y-F3-AX

Overview

PS9905-Y-F3-AX from Renesas Electronics is a high-speed, 2.5 A peak output current photovoltaic IGBT gate driver optocoupler in an 8-pin LSDIP package with 15 mm creepage distance, UVLO protection with hysteresis, and ±25 kV/µs common-mode transient immunity-designed for driving 1200 V / 75 A IGBTs in industrial and solar inverters.

For engineers reviewing the PS9905-Y-F3-AX datasheet, PS9905-Y-F3-AX pinout, PS9905-Y-F3-AX application, or PS9905-Y-F3-AX equivalent, this device delivers verified high-CMR isolation, fast 0.15 µs propagation delay, reinforced insulation per UL1577/CAN/CSA-C22.2 No.62368-1, and embossed tape packaging for automated assembly.

Technical Context

The PS9905-Y-F3-AX integrates an AlGaAs LED input stage with a monolithic output stage comprising a photodiode, signal processing circuit, and power transistor-enabling direct gate drive without external amplification. Its UVLO circuit activates at 10.8–13.4 V (turn-on) and deactivates at 9.5–12.5 V (turn-off), providing 0.4–1.3 V hysteresis to prevent oscillation during supply ramp-up/down.

It operates across –40 °C to +110 °C ambient, supports 15–30 V supply range (VCC–VEE), and achieves 50 ns rise/fall times under 10 Ω/10 nF IGBT-equivalent load conditions. The 8-pin LSDIP package features internal shield and non-connected pins (1, 4, 6) to enhance noise immunity in high-dV/dt environments.

Key Specifications

Pinout & Package

PS9905-Y-F3-AX uses an 8-pin Long Creepage SDIP (LSDIP) package with 1.27 mm pitch, 16.7 mm body width, and internal shield. Pins 1, 4, and 6 are NC (non-connected); unused pins must be left open or tied to respective GND planes-not used as signal paths.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar IGBT gate driver applications.

Compared with TLP350 and FOD3180, PS9905-Y-F3-AX uniquely combines 15 mm creepage, integrated UVLO with hysteresis, and 2.5 A peak drive in a single-component solution-reducing BOM count and improving system-level safety certification readiness for solar and industrial inverters.

Availability

PS9905-Y-F3-AX is available at Aetrix Electronics and suitable for industrial motor drives, solar inverters, and uninterruptible power supplies requiring stable component supply, long-term lifecycle support, and certified reinforced isolation.

Supply support for PS9905-Y-F3-AX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Renesas Electronics is a global semiconductor leader specializing in microcontrollers, analog, power, and mixed-signal solutions for industrial, automotive, and infrastructure markets.

The PS9905-Y-F3-AX belongs to Renesas' high-CMR photocopler family engineered specifically for robust IGBT and MOSFET gate driving in high-noise, high-voltage power conversion systems.

FAQ

What is the maximum recommended forward current for the PS9905-Y-F3-AX LED input?

The PS9905-Y-F3-AX specifies a recommended forward current of 10–14 mA (IF(ON)) for reliable turn-on. Absolute maximum continuous forward current is 25 mA, but sustained operation above 14 mA accelerates LED aging and reduces isolation lifetime. For optimal reliability and 110 °C operation, design to 12 mA with derated drive circuitry.

Does the PS9905-Y-F3-AX require an external bypass capacitor?

Yes-the PS9905-Y-F3-AX requires a ≥0.1 µF ceramic bypass capacitor between VCC and VEE, placed within 10 mm of the device pins. This stabilizes the internal supply during high di/dt gate switching events and prevents UVLO false triggering. Failure to include this capacitor may cause erratic output behavior under load.

Can pins 1, 4, and 6 be used as ground connections on the PS9905-Y-F3-AX?

Pins 1 and 4 (input-side NC) may be connected to the LED-side GND plane; pin 6 (output-side NC) may be connected to the detector-side GND (VEE). However, they must never carry signal current or serve as routing paths-doing so degrades internal shielding and compromises CMR performance. Leaving them unconnected is also acceptable.

What safety certifications does the PS9905-Y-F3-AX hold?

The PS9905-Y-F3-AX is UL1577 approved (double protection), CAN/CSA-C22.2 No.62368-1 certified (reinforced insulation), SEMKO-approved per EN/IEC 62368-1 (14.5 mm creepage, with 15 mm in process), and optionally VDE-certified per DIN EN 60747-5-5. All approvals apply to the PS9905-Y-F3-AX variant.

How does the UVLO function behave during power-up of the PS9905-Y-F3-AX?

During power-up, the PS9905-Y-F3-AX UVLO circuit holds the output disabled until VCC reaches ≥10.8 V (typical VUVLO+), then enables gate drive. If VCC drops below 9.5 V (typical VUVLO−), output disables again. Turn-on delay is ≤0.8 µs; turn-off delay is ≤0.6 µs-ensuring clean, chatter-free IGBT control during supply ramping.