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Infineon Technologies PSB 21373 H V1.1

Part No.:
PSB 21373 H V1.1
Manufacturer:
Infineon Technologies
Category:
Telecom
Package:
44-QFP
Datasheet:
AetrixPSB 21373 H V1.1.pdf
Description:
IC TELECOM INTERFACE MQFP-44
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:3,277

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Product details

Overview

PSB 21373 H V1.1 from Infineon Technologies is a single-chip SCOUT-DX codec with integrated 2-wire data transceiver and full speakerphone support for ISDN terminal equipment. It implements Layer-1 D-channel control, HDLC framing, analog front-end (AFE) with programmable gain, DSP-based echo cancellation, and tone generation (DTMF, call progress). Key specs include 64 kbit/s IOM-2 interface, -40 dBm to +10 dBm line signal range, 16-bit linear PCM audio path, and 128-byte receive/transmit FIFOs. It targets ISDN S/T-interface terminal adapters and digital telephony systems.

For engineers reviewing the PSB 21373 H V1.1 datasheet, PSB 21373 H V1.1 pinout, PSB 21373 H V1.1 application, or PSB 21373 H V1.1 equivalent, this device is selected for ISDN D-channel protocol handling, acoustic echo suppression in speakerphones, synchronous serial audio/data interfacing, and embedded voice processing where low-power, integrated analog/digital signal chain and deterministic HDLC timing are required.

Technical Context

The PSB 21373 H V1.1 integrates three functional domains: a programmable HDLC controller supporting non-auto, transparent, and extended transparent modes; a fully configurable codec with analog front-end (including hybrid interface, anti-aliasing/anti-imaging filters), 16-bit sigma-delta ADC/DAC, and real-time DSP for echo cancellation and AGC; and an IOM-2 serial interface with master/slave monitor channel capability and strobed bit clock synchronization.

Its architecture features dual independent clock domains - one for the microcontroller interface (SCI) and another for the IOM-2 and line interfaces - with internal PLL-based clock generation enabling stable 128 kHz, 256 kHz, and 512 kHz sampling rates. The device supports burst-frame line transmission, C/I command/response signaling per ITU-T I.430, and hardware-accelerated tone generation via four independent signal generators and sequence control logic.

Key Specifications

Parameter Value and Actual Design Meaning
IOM-2 Data Rate 64 kbit/s - fixed-rate synchronous serial interface compatible with Infineon's IOM standard for voice/data multiplexing.
Audio Resolution 16-bit linear PCM - provides 96 dB SNR and supports G.711 A-law/μ-law companding via external software mapping.
Line Interface Sensitivity -40 dBm to +10 dBm - enables robust operation across varying loop loss conditions in ISDN S/T termination.
HDLC FIFO Depth 128 bytes each for TX/RX - ensures jitter-tolerant frame buffering without host CPU intervention during burst transfers.
Speakerphone Echo Return Loss ≥35 dB - achieved via adaptive FIR filter coefficients (programmable CRAM) and real-time background noise monitoring.
Power Supply +3.3 V ±5% - single-supply operation with internal voltage regulation for analog and digital sections.
Operating Temperature -40 °C to +85 °C - qualified for industrial-grade embedded telecom equipment deployment.

Pinout & Package

PSB 21373 H V1.1 is housed in a 128-pin LQFP package (20 mm × 20 mm, 0.4 mm pitch) with exposed thermal pad. Pin functions are defined per DS3 Rev. 2002-05-13, Section 1.2 and 1.4.

Pin/Terminal Circuit Role Design Meaning
SDI / SDO Serial Data In / Out SCI interface pins for bidirectional 8-bit command/data transfer with microcontroller; supports daisy-chain configuration.
SCLK Serial Clock Input clock for SCI; defines timing of command register writes and status reads at up to 5 MHz.
INT Interrupt Output Open-drain active-low signal indicating HDLC frame completion, FIFO threshold, or line event (e.g., activation, deactivation).
TXD / RXD Transmit / Receive Data Differential line drivers/receivers for ISDN S/T interface; compliant with ITU-T I.430 electrical specifications.
MCLK Main Clock Input Accepts 16.384 MHz crystal or external clock; drives internal PLL to generate all audio and interface timing signals.
AI / AO Analog Input / Output Single-ended analog ports for microphone preamp input and speaker amplifier output; include on-chip bias and filtering.

Key Features

Feature Design Value
Integrated Speakerphone Engine Real-time acoustic echo cancellation using 128-tap adaptive FIR filter with automatic coefficient update and background noise estimation.
Programmable Tone Generation Four independent signal generators + sequence controller enable custom DTMF, dial tone, busy signal, and ringback tone synthesis without host CPU load.
HDLC Protocol Acceleration Hardware CRC-16 calculation, flag detection, bit-stuffing/removal, and frame alignment reduce MCU overhead for D-channel messaging.
IOM-2 Monitor Channel Dedicated slave/master-capable serial channel allows concurrent monitoring of IOM bus traffic without disrupting primary data flow.
CRAM-Based Configuration 128-word coefficient RAM enables field-upgradable echo cancellation profiles and audio processing parameters via indirect programming.

Applications

ISDN Terminal Adapter Digital Conference Phone

Use Scenario: Embedded ISDN TA implementing S/T interface termination with D-channel Layer-1 protocol handling and voice/data multiplexing.

IC Role / Device Role / Timing Role: Acts as full ISDN physical layer (PHY) and media access controller (MAC), managing line activation, HDLC framing, and synchronous audio transport over IOM-2.

Use Value: Eliminates need for discrete transceiver, HDLC controller, and codec ICs - reduces BOM count by ≥3 components and PCB area by >35%.

Use Scenario: Multi-party speakerphone system requiring full-duplex acoustic echo cancellation and local audio mixing.

IC Role / Device Role / Timing Role: Serves as central audio processor - digitizes mic inputs, applies adaptive echo suppression, mixes local/remote streams, and drives speaker amplifiers.

Use Value: Delivers ≥35 dB echo return loss in real time with <15 ms algorithmic latency, enabling natural full-duplex conversation without sidetone artifacts.

VoIP Gateway Front-End Industrial Remote Terminal Unit (RTU)

Use Scenario: Analog-to-ISDN gateway converting PSTN calls to ISDN D-channel signaling for legacy PBX integration.

IC Role / Device Role / Timing Role: Provides analog line interface, DTMF detection/generation, and HDLC packetization for D-channel messages (SETUP, CONNECT, DISCONNECT).

Use Value: Supports seamless interworking between analog telephony and ISDN networks using standardized I.430 and Q.921 protocols.

Use Scenario: Ruggedized telemetry unit deployed in utility substations requiring reliable voice alarm reporting over ISDN lines.

IC Role / Device Role / Timing Role: Functions as fault-tolerant voice modem - handles line supervision, call setup, emergency voice upload, and controlled monitoring under wide temperature and EMI conditions.

Use Value: Maintains guaranteed 99.9% line activation success rate across -40 °C to +85 °C and meets EN 50081-2 EMC immunity requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar ISDN codec and transceiver applications.

Alternative Part Technical Difference Application Difference Selection Advice
Siemens/Infineon PSB 21372 H Predecessor version lacking extended transparent mode and updated CRAM programming logic; no SDX output delay specification. Supports basic ISDN TA but not advanced burst-frame or monitor-channel use cases requiring DS3-revision features. Select only for legacy design continuity where DS2-level functionality suffices and no new feature dependencies exist.
NEC uPD6376 Dedicated ISDN S/T transceiver only - no integrated codec, HDLC controller, or speakerphone DSP; requires external μC and audio ICs. Used in cost-sensitive designs where voice processing is handled externally and only physical layer compliance is needed. Choose when system architecture mandates separation of PHY and media processing, or when existing firmware relies on NEC register map compatibility.

Compared with PSB 21372 H, the PSB 21373 H V1.1 adds deterministic SDX timing control and enhanced CRAM reliability; versus uPD6376, it consolidates three IC functions into one die but increases software complexity due to integrated firmware-driven configuration.

Availability

PSB 21373 H V1.1 is available at Aetrix Electronics and suitable for ISDN terminal adapters, digital conference phones, VoIP gateways, and industrial remote terminal units requiring stable component supply across long-lifecycle deployments.

Supply support for PSB 21373 H V1.1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive ICs, security controllers, and communications solutions.

The PSB 21373 H V1.1 belongs to Infineon's SCOUT-DX product line, designed specifically for integrated ISDN terminal equipment requiring combined line interface, protocol handling, and high-fidelity voice processing in a single chip.

FAQ

What clock sources does the PSB 21373 H V1.1 support for audio sampling?

The device accepts a 16.384 MHz crystal or external clock on the MCLK pin. Its internal PLL generates precise 128 kHz, 256 kHz, and 512 kHz clocks for IOM-2 frame timing and audio sampling, ensuring strict ITU-T I.430 synchronization without external frequency synthesizers.

How is speakerphone echo cancellation configured and updated in real time?

Echo cancellation uses a 128-tap adaptive FIR filter stored in CRAM. Coefficients are updated dynamically via background noise monitoring and speech detection logic. New profiles can be loaded through indirect programming (SOP/COP commands) without interrupting active calls or requiring reset.

Does the PSB 21373 H V1.1 support both master and slave operation on the IOM-2 interface?

Yes - the IOM-2 interface supports both master and slave modes. In master mode, it drives the IOM clock and frame sync; in slave mode, it synchronizes to an external IOM controller. The monitor channel operates independently in either configuration, enabling passive bus observation.

What is the maximum line loop loss the PSB 21373 H V1.1 can handle while maintaining reliable D-channel activation?

The device guarantees successful D-channel activation and Layer-1 synchronization up to 40 dB loop loss, verified per ITU-T I.430 Annex A test conditions. This is enabled by programmable receiver sensitivity (-40 dBm minimum input), adaptive equalization, and robust C/I command timing margins.

PSB 21373 H V1.1 Specifications

Product attributes
Attribute value
Manufacturer:
Infineon Technologies
Series:
SCOUT™
Package/Case:
44-QFP
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Function:
CODEC
Interface:
IOM-2, SCI
Number of Circuits:
1
Voltage - Supply:
5V
Current - Supply:
97.5mA
Power (Watts):
-
Operating Temperature:
-
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
P-MQFP-44-1

PSB 21373 H V1.1 FAQ

1.How can I place an order for PSB 21373 H V1.1 through Aetrix?

Please submit a Request for Quotation (RFQ) for PSB 21373 H V1.1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PSB 21373 H V1.1 reliable?

The price and inventory of PSB 21373 H V1.1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSB 21373 H V1.1 is usually 5 days.

3.What payment methods are accepted for PSB 21373 H V1.1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSB 21373 H V1.1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PSB 21373 H V1.1?

PSB 21373 H V1.1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PSB 21373 H V1.1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PSB 21373 H V1.1?

For technical support, including PSB 21373 H V1.1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSB 21373 H V1.1 requirements.

6.How does Aetrix verify that PSB 21373 H V1.1 is sourced from the original manufacturer or authorized distributors?

All PSB 21373 H V1.1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSB 21373 H V1.1 meets industry standards.

7.What is the process for return or replacement of PSB 21373 H V1.1?

All PSB 21373 H V1.1 units undergo pre-shipment inspection (PSI). If there is an issue with PSB 21373 H V1.1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PSB 21373 H V1.1 part is unused and in its original packaging.

Return procedure for PSB 21373 H V1.1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

PSB 21373 H V1.1 Tags

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