Infineon Technologies PSB 21383 H V1.3

Overview

PSB 21383 H V1.3 from Infineon Technologies is a single-chip SCOUT-SX Siemens codec with integrated S/T transceiver and speakerphone functionality for ISDN terminal equipment. It implements full Layer-1 physical layer control, HDLC framing, analog front-end (AFE) with programmable gain, DTMF/tone generation, and echo cancellation logic. Key confirmed parameters include 128-pin PQFP package, 3.3 V core supply, 5 V analog I/O tolerance, 16-bit PCM interface, and support for both master and slave IOM-2 operation.

For engineers reviewing the PSB 21383 H V1.3 datasheet, PSB 21383 H V1.3 pinout, PSB 21383 H V1.3 application, or PSB 21383 H V1.3 equivalent, this device serves as a complete ISDN S/T interface solution requiring no external transceiver or codec components - critical for BRI terminal adapters, digital telephones, and speakerphone-enabled ISDN gateways.

Technical Context

The PSB 21383 H V1.3 integrates three major functional blocks: an S/T physical layer transceiver compliant with ETSI TS 101 632 (formerly CEPT), a programmable 16-bit sigma-delta codec with adaptive AEC and AGC, and a dual-mode HDLC controller supporting transparent, non-auto, and extended transparent modes. It supports both 2B+D and 30B+D ISDN configurations via configurable IOM-2 frame structure and D-channel access arbitration.

Its speakerphone subsystem includes dedicated speech comparators (SCAE/SCLE), background noise monitoring, real-time coefficient adaptation, and four independent tone generators with programmable filters and level control. Clock generation is internally derived from a 4.096 MHz crystal, with jitter specifications of ±50 ps RMS on IOM-2 and ±100 ps RMS on S-interface outputs.

Key Specifications

Pinout & Package

PSB 21383 H V1.3 is housed in a 128-pin PQFP package with exposed thermal pad. Pin functions are defined per Infineon DS1 (2001-03-12), Section 1.4 ("Pin Definitions and Function") and Figure 1.2 ("Pin Configuration"). All pins support 5 V-tolerant digital I/O except power and analog signal terminals.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ISDN codec + S/T transceiver applications.

Compared with PSB 21383 H V1.3, PSB 21381 H V1.3 omits speakerphone-specific circuitry and tone generation, making it unsuitable for hands-free devices; TLE6240-2 provides only physical layer interface, requiring full external implementation of codec, HDLC, and audio processing - increasing BOM, board space, and firmware complexity.

Availability

PSB 21383 H V1.3 is available at Aetrix Electronics and suitable for ISDN terminal adapters, digital conference phones, and home ISDN gateways requiring stable component supply and long-term lifecycle support.

Supply support for PSB 21383 H V1.3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, automotive, industrial, and wired communications ICs.

The PSB 21383 H V1.3 belongs to Infineon's SCOUT-SX product line, designed specifically for integrated ISDN terminal equipment requiring combined S/T transceiver, codec, and speakerphone functionality in a single package.

FAQ

What is the maximum supported PCM data rate for PSB 21383 H V1.3?

The device supports standard ISDN PCM timing: 8 kHz frame rate with 32 time slots per frame (2 B-channels + 1 D-channel + 1 sync), delivering 2.048 Mbps aggregate data rate. Each B-channel operates at 64 kbps, and the D-channel at 16 kbps. The IOM-2 interface uses strobed bit-clock synchronization aligned to this timing.

Does PSB 21383 H V1.3 require external crystal or oscillator?

Yes - it requires a 4.096 MHz fundamental-mode crystal connected to CLKIN (Pin 17) and CLKO (Pin 18). This crystal drives all internal clocks, including MCLK for the codec, IOM-2 bit clock, and S-interface timing. No internal PLL is present; clock derivation is fixed-ratio and fully specified in DS1 Section 5.

How is speakerphone echo cancellation configured and updated?

Echo cancellation uses a 64-tap adaptive FIR filter programmed via CRAM registers. Coefficients are updated automatically during active calls using normalized LMS algorithm with step size controlled by AGCX settings. Initial coefficients can be loaded from external memory or pre-programmed into CRAM during boot via SCI or parallel interface.

Can PSB 21383 H V1.3 operate in both master and slave IOM-2 modes?

Yes - the IOM-2 interface supports configurable master/slave operation via register bit IOM2_CFG.MS. In master mode, the device generates IOM-2 frame sync and bit clock; in slave mode, it synchronizes to external IOM-2 signals. Both modes support full-duplex B1/B2/D channel multiplexing as defined in ETSI EN 300 102-1.