STMicroelectronics PSD813F1A-90M

Overview

PSD813F1A-90M from STMicroelectronics is a Flash-based, in-system programmable (ISP) peripheral IC designed to augment 8-bit microcontrollers with dual-bank nonvolatile memory, configurable PLD logic, and reconfigurable I/O. It integrates 1 Mbit primary Flash, 256 Kbit secondary EEPROM, 16 Kbit SRAM, >3,000-gate PLD (DPLD + CPLD), and 27 reconfigurable I/Os - all operating at 5 V ±10%. It enables concurrent read/erase/write operations and is used in legacy industrial control systems requiring field-upgradable firmware and flexible address decoding.

For engineers reviewing the PSD813F1A-90M datasheet, PSD813F1A-90M pinout, PSD813F1A-90M application, or PSD813F1A-90M equivalent, key selection considerations include concurrent Flash/EEPROM operation capability, JTAG-based ISP without MCU involvement, page register–enabled 256× address space expansion, PLD macrocell configurability (16 OMCs / 24 IMCs), and ECOPACK® PQFP52 package compatibility with 80C51/68HC11 buses.

Technical Context

The PSD813F1A-90M implements a tightly coupled architecture where the MCU bus directly accesses internal registers via dedicated decode logic, eliminating external glue logic. Its dual-bank memory supports simultaneous read from one bank while erasing/writing the other, enabling true in-application programming (IAP) for firmware updates without system halt.

The integrated PLD comprises two distinct blocks: a Decode PLD (DPLD) for user-defined chip-select generation and a Complex PLD (CPLD) with 16 output macrocells (OMCs) and 24 input macrocells (IMCs), supporting combinational and registered logic functions. All PLD configuration, Flash, EEPROM, and SRAM are programmed via IEEE 1149.1-compliant JTAG - no host MCU required.

Key Specifications

Pinout & Package

PSD813F1A-90M is packaged in ECOPACK®-compliant PQFP52 (plastic quad flat pack, 52-pin, 0.65 mm pitch). Pin functions are validated per STMicroelectronics datasheet Rev 5 (October 2008), pages 10–13.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar programmable peripheral applications.

Compared with PSD813F1A-90M, the PSD813F2A-90M offers double Flash capacity with zero design impact, while the PSD833F2A-90M delivers scalable logic and memory headroom - both preserve JTAG ISP, page register functionality, and 5 V operation for seamless migration paths.

Availability

PSD813F1A-90M is available at Aetrix Electronics and suitable for industrial control retrofitting, legacy medical device firmware upgrades, automotive body electronics, and test equipment configuration management requiring stable component supply and long-term obsolescence mitigation.

Supply support for PSD813F1A-90M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering microcontrollers, analog ICs, MEMS, and power management solutions for industrial, automotive, and consumer markets.

The PSD (Programmable System Device) family was engineered to eliminate discrete glue logic and external memory in 8-bit MCU systems - targeting cost-sensitive, space-constrained embedded designs requiring field-programmable flexibility without architectural overhaul.

FAQ

Is PSD813F1A-90M still in production despite the "Not for New Design" notice?

Yes. STMicroelectronics continues manufacturing PSD813F1A-90M under its long-term supply program for existing designs. The "Not for New Design" designation reflects strategic focus on newer architectures, not imminent discontinuation. Aetrix Electronics maintains active inventory and supports multi-year procurement commitments with documented lot traceability.

Can the JTAG port be used to reprogram Flash after the device is soldered to a PCB?

Yes. The IEEE 1149.1-compliant JTAG interface supports full in-system programming of Flash, EEPROM, PLD logic, and configuration bits without MCU involvement. No bootloader or firmware is required - programming occurs directly through TCK/TMS/TDI/TDO pins using standard JTAG adapters and PSDsoft Express software.

What is the role of the page register, and how does it affect MCU address decoding?

The 8-bit page register extends the MCU's 16-bit address space by acting as upper address bits (A16–A23), enabling access to up to 256 × 64 KB = 16 MB of memory-mapped resources. It is written via dedicated PSD register writes and retained across power cycles, allowing legacy 80C51/68HC11 systems to manage large Flash/EEPROM/SRAM banks without external address latches or banking logic.

Does PSD813F1A-90M support concurrent read and write to the same memory bank?

No. Concurrent operation is strictly cross-bank: read from primary Flash while erasing/writing secondary EEPROM (or vice versa). Within a single bank (e.g., Flash), read and write/erase cannot occur simultaneously - the RDY/BSY pin must be polled or an interrupt used to confirm operation completion before initiating the next access.