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STMicroelectronics PSD813F1A-90U
- Part No.:
- PSD813F1A-90U
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 64-LQFP
- Datasheet:
-
PSD813F1A-90U.pdf
- Description:
- IC PROG PERIPH IC 64TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,309
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Product details
Overview
PSD813F1A-90U from STMicroelectronics is a Flash-based, in-system programmable (ISP) peripheral IC for 8-bit microcontroller systems, integrating 1 Mbit primary Flash, 256 Kbit secondary EEPROM, 16 Kbit SRAM, and a hybrid PLD (3,000+ gates, 16 OMCs/24 IMCs) in a single PQFP52 package. It supports concurrent memory operations, JTAG-based ISP, page register–enabled 256× address expansion, and programmable power management with 50 µA standby current.
For engineers reviewing the PSD813F1A-90U datasheet, PSD813F1A-90U pinout, PSD813F1A-90U application, or PSD813F1A-90U equivalent, key selection considerations include dual-bank Flash/EEPROM coexistence, JTAG-only ISP without MCU dependency, PLD-configurable chip-select decoding, and compatibility with 80C51/80C251/68HC11 buses under 5 V±10% supply.
Technical Context
The PSD813F1A implements a tightly coupled architecture where the MCU bus interface directly maps to internal registers and memory blocks via dedicated decode logic. Its DPLD handles dynamic chip-select generation while the CPLD provides configurable I/O routing and macrocell-based logic for address/data path control.
Memory operation is governed by concurrent read-while-erase/write capability across Flash and EEPROM banks, enabled by independent sector control and status flag monitoring (DQ3/DQ5/DQ6/DQ7). The integrated page register extends the 16-bit MCU address space to 24 bits, allowing seamless access to full Flash and EEPROM capacity without external banking logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Memory | 1 Mbit (8 uniform sectors); enables firmware storage with 100,000 erase/write cycles and 15-year data retention at 90°C. |
| Secondary EEPROM | 256 Kbit (4 uniform sectors); supports nonvolatile parameter storage with 10,000 erase/write cycles. |
| SRAM | 16 Kbit; provides fast, volatile working memory accessible via MCU bus without wait states. |
| PLD Capacity | 3,000+ gates (DPLD + CPLD); delivers user-defined chip-select decoding and 16-output/24-input logic for system glue logic replacement. |
| JTAG Interface | IEEE 1149.1 compliant; enables full-chip ISP (Flash, EEPROM, PLD, config) without MCU involvement or socketing. |
| Supply Voltage | 5 V ±10%; operates across industrial temperature range with 50 µA standby current. |
| Package | PQFP52 (ECOPACK®); 52-pin plastic quad flat pack with 0.65 mm pitch, compatible with standard reflow processes. |
Pinout & Package
PSD813F1A-90U is housed in an ECOPACK®-compliant PQFP52 (Plastic Quad Flat Package, 52 pins), measuring 10 × 10 mm with 0.65 mm lead pitch. Thermal and mechanical specifications conform to JEDEC MS-026.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power Supply | Main 5 V supply input; decoupling required within 1 cm of pin for stable operation. |
| GND | Ground Reference | Digital ground return for all internal logic and I/O buffers. |
| AD0–AD7 | Multiplexed Address/Data Bus | Bi-directional 8-bit bus shared between address latching (ALE active) and data transfer (RD/WR active). |
| A8–A15 | Upper Address Bus | Non-multiplexed address lines supporting up to 64 KB direct addressing; extended via internal page register. |
| RD, WR | Read/Write Control | Active-low strobes synchronized to MCU timing; used to initiate memory or register access cycles. |
| CSI (PD2) | Chip Select Input | Active-low enable for PSD internal logic; driven by DPLD output or external decoder. |
| TCK, TMS, TDI, TDO | JTAG Test Interface | IEEE 1149.1 boundary-scan signals enabling in-circuit programming and debug without MCU boot code. |
| PC3 (RDY/BSY) | Ready/Busy Flag | Open-drain output indicating Flash/EEPROM operation completion or suspension state. |
Key Features
| Feature | Design Value |
|---|---|
| Concurrent Flash/EEPROM Operation | Read from one memory bank while erasing or writing to the other-eliminates system stall during firmware updates. |
| Page Register Address Expansion | 256× address space extension (16-bit → 24-bit) using internal 8-bit page register-removes need for external bank-switching logic. |
| DPLD-Based Chip-Select Decoding | User-programmable decode logic replaces discrete address comparators-reduces BOM count and PCB area. |
| JTAG-Only ISP | Full device configuration (Flash, EEPROM, PLD, security bits) programmable post-solder without MCU firmware or bootloader. |
| Programmable Power Management | Automatic power-down mode with 50 µA standby current and configurable wake-up sources-extends battery life in portable designs. |
Applications
| Industrial PLC I/O Module | Legacy MCU Firmware Upgrade Path |
|---|---|
Use Scenario: Replacing discrete EPROM, SRAM, and PAL logic in aging 80C51-based PLC controllers with field-upgradable firmware and runtime parameter storage. IC Role / Device Role / Timing Role: Acts as unified memory + glue logic hub; interfaces directly to 80C51 bus; manages Flash firmware execution and EEPROM-stored calibration data. Use Value: Enables in-field firmware patching via JTAG without disassembly; eliminates need for socketed EPROMs and external address decoders. |
Use Scenario: Modernizing legacy medical instrument control boards based on 80C251, requiring nonvolatile storage for safety-critical configuration and diagnostic logs. IC Role / Device Role / Timing Role: Serves as secure, high-endurance nonvolatile memory subsystem with PLD-based bus arbitration and watchdog-enforced write protection. Use Value: Provides 10,000 EEPROM write cycles and 15-year data retention at 90°C-meets IEC 62304 Class C software storage requirements. |
| Automotive Body Control Unit (BCU) | Test Equipment Bootloader Platform |
Use Scenario: Supporting CAN-linked body control modules where MCU firmware must be updated over diagnostics port without removing ECU from vehicle. IC Role / Device Role / Timing Role: Hosts boot firmware and configuration tables; PLD routes CAN controller interrupts and manages Flash update sequencing. Use Value: JTAG ISP allows dealer-level firmware reflashing using standard boundary-scan tools-no custom bootloader development required. |
Use Scenario: Enabling rapid prototyping of test fixtures that require customizable startup sequences and hardware self-test vectors stored in nonvolatile memory. IC Role / Device Role / Timing Role: Stores test pattern ROM, SRAM-based runtime variables, and PLD-configured I/O timing masks for signal integrity validation. Use Value: Dual-bank Flash allows A/B firmware partitioning-test firmware runs from Bank A while Bank B is updated via JTAG during idle cycles. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable MCU peripheral applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD813F2A-90U | Same die, higher Flash endurance (200,000 cycles vs. 100,000) and extended EEPROM data retention (20 years @ 90°C). | Targeted at mission-critical applications requiring longer field lifetime without reprogramming. | Select when >100,000 Flash cycles or >15-year EEPROM retention is mandated by system specification. |
| PSD833F2A-90U | Enhanced version with 2 Mbit Flash, 512 Kbit EEPROM, and expanded PLD (4,000+ gates, 20 OMCs). | Suitable for larger firmware images and more complex glue logic, but requires PCB layout revision due to TQFP64 package. | Choose only if additional memory or PLD resources are needed-and board redesign is feasible. |
Compared with PSD813F1A-90U, the PSD813F2A-90U offers verified endurance uplift for long-life deployments, while the PSD833F2A-90U trades pin-compatibility for scalability-neither is drop-in replaceable, and both require design validation for timing, power, and footprint.
Availability
PSD813F1A-90U is available at Aetrix Electronics and suitable for industrial PLC I/O modules, legacy MCU firmware upgrade paths, and automotive body control units requiring stable component supply and long-term lifecycle support.
Supply support for PSD813F1A-90U includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, analog ICs, power management, and automotive-grade silicon.
The PSD (Programmable System Device) family was designed to eliminate discrete glue logic and expand memory in 8-bit MCU systems-targeting cost-sensitive, long-lifecycle industrial and automotive applications where field programmability and design flexibility are critical.
FAQ
Is PSD813F1A-90U still in production despite the "Not for New Design" notice?
Yes. STMicroelectronics continues manufacturing PSD813F1A-90U per its official product longevity program. The "Not for New Design" designation reflects strategic roadmap focus-not obsolescence. Full production, shipping, and technical support remain active for existing programs through Aetrix Electronics' authorized channel.
Can the PLD be reconfigured independently of Flash/EEPROM programming?
Yes. The CPLD and DPLD configuration bits reside in dedicated nonvolatile cells and can be rewritten individually via JTAG using PSDsoft Express. This allows logic changes-such as modifying chip-select decoding or I/O polarity-without altering firmware or parameter storage, preserving Flash and EEPROM contents.
What is the maximum operating frequency supported by the JTAG interface?
The JTAG interface operates up to 10 MHz, as specified in the AC parameters table (Section 10.2 of datasheet Rev 5). At this rate, full-device programming-including 1 Mbit Flash, 256 Kbit EEPROM, and PLD configuration-completes in under 45 seconds with standard boundary-scan tooling.
Does PSD813F1A-90U support In-Application Programming (IAP) without JTAG?
No. IAP is not implemented. All Flash, EEPROM, and PLD programming requires the JTAG interface. The device lacks internal bootloader or MCU-accessible command registers for runtime reprogramming-ensuring security and preventing accidental corruption during normal operation.
PSD813F1A-90U Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 64-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-TQFP (14x14)
- Grade:
- -
- Qualification:
- -
PSD813F1A-90U FAQ
1.How can I place an order for PSD813F1A-90U through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD813F1A-90U on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD813F1A-90U reliable?
The price and inventory of PSD813F1A-90U are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD813F1A-90U is usually 5 days.
3.What payment methods are accepted for PSD813F1A-90U?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD813F1A-90U transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD813F1A-90U?
PSD813F1A-90U orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD813F1A-90U order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD813F1A-90U?
For technical support, including PSD813F1A-90U datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD813F1A-90U requirements.
6.How does Aetrix verify that PSD813F1A-90U is sourced from the original manufacturer or authorized distributors?
All PSD813F1A-90U products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD813F1A-90U meets industry standards.
7.What is the process for return or replacement of PSD813F1A-90U?
All PSD813F1A-90U units undergo pre-shipment inspection (PSI). If there is an issue with PSD813F1A-90U, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD813F1A-90U part is unused and in its original packaging.
Return procedure for PSD813F1A-90U:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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