STMicroelectronics PSD813F1VA-15J
- Part No.:
- PSD813F1VA-15J
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 52-LCC (J-Lead)
- Datasheet:
-
PSD813F1VA-15J.pdf
- Description:
- IC PROG PERIPH IC 52PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:1,984
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Product details
Overview
PSD813F1VA-15J from STMicroelectronics is a programmable system device (PSD) integrating dual Flash memory (1MB primary Flash + 64KB secondary EEPROM), PLD-based logic, SRAM, and configurable I/O ports for embedded microcontroller peripheral expansion. It supports in-system programming via JTAG, features uniform 256-byte Flash erase sectors, and delivers 15 ns access time for real-time MCU interface applications in industrial control and automotive ECUs.
For engineers reviewing the PSD813F1VA-15J datasheet, PSD813F1VA-15J pinout, PSD813F1VA-15J application, or PSD813F1VA-15J equivalent, this device serves as a unified logic+memory co-processor for 8-bit/16-bit MCUs requiring nonvolatile configuration storage, address decoding, and glue logic replacement without external CPLDs or discrete memory chips.
Technical Context
The PSD813F1VA-15J implements a hybrid architecture with two independent memory arrays: a 1MB primary Flash block organized in 256-byte uniform sectors and a 64KB secondary EEPROM block with byte-level write capability. Its PLD logic includes dual 32-macrocell CPLD blocks supporting combinational and registered outputs with user-defined timing constraints.
Memory mapping is managed through a programmable Page Register (PAGE) and Address Decoder Logic (ADL), enabling dynamic bank switching between Flash, EEPROM, and SRAM spaces. The JTAG interface complies with IEEE 1149.1 and supports full boundary-scan testing, ISP programming, and real-time debug access to internal registers and memory contents.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Size | 1 MB (1024 KB) - provides main program storage space for MCU firmware or boot code |
| Secondary EEPROM Size | 64 KB - enables persistent parameter storage with byte-write capability and 100K erase/write cycles |
| Access Time | 15 ns - ensures zero-wait-state operation with 66 MHz MCUs like Intel 80C186 or Motorola 68HC11 |
| Flash Erase Sector Size | 256 bytes - allows fine-grained firmware updates without erasing entire banks |
| JTAG Compliance | IEEE 1149.1 - enables standardized in-circuit programming and boundary-scan diagnostics |
| Supply Voltage | 5.0 V ±10% - compatible with legacy 5V industrial and automotive MCU systems |
| Operating Temperature | –40°C to +85°C - qualified for under-hood and factory-floor environments |
Pinout & Package
PSD813F1VA-15J uses a 44-pin PLCC (Plastic Leaded Chip Carrier) package with 0.6-inch body size and J-lead construction, optimized for reflow soldering and high-reliability board mounting in vibration-prone applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A19 | Address Inputs | 20-bit address bus supporting up to 1 MB linear addressing; multiplexed with data on DQ0–DQ7 during read/write cycles |
| DQ0–DQ7 | Data I/O | 8-bit bidirectional data bus shared with address lines in multiplexed mode; supports standard 8-bit MCU data transfers |
| CE# | Chip Enable | Active-low enable controlling device selection; must be asserted before OE# or WE# for valid memory access |
| OE# | Output Enable | Active-low signal gating data output drivers; used during read operations only |
| WE# | Write Enable | Active-low signal initiating Flash or EEPROM write cycles; latches address/data on rising edge |
| JTAG_TCK | JTAG Clock | Input clock for JTAG state machine; maximum frequency 10 MHz per IEEE 1149.1 compliance |
| JTAG_TDI | JTAG Data In | Serial input for instruction and data shifting into TAP controller and boundary-scan register |
| JTAG_TDO | JTAG Data Out | Serial output from TAP controller; synchronized to TCK falling edge |
| JTAG_TMS | JTAG Mode Select | Controls TAP state transitions; sampled on TCK rising edge |
| VCC | Power Supply | +5.0 V supply for core logic and memory arrays; requires local 0.1 µF ceramic decoupling |
| GND | Ground Reference | Signal and power ground reference plane connection point |
Key Features
| Feature | Design Value |
|---|---|
| Dual-memory architecture | Independent 1MB Flash + 64KB EEPROM blocks allow simultaneous firmware execution and parameter logging without contention |
| Uniform 256-byte Flash sectors | Enables precise field firmware patching without erasing unrelated code sections or risking corruption |
| Configurable I/O ports (Port A/B/C/D) | Each port supports direction control, latch enable, and open-drain/totem-pole output modes for flexible MCU bus interfacing |
| PLD-based address decoding | Eliminates need for external PAL/GAL logic by embedding decode logic directly in device configuration bitstream |
| JTAG in-system programming | Permits firmware updates and logic reconfiguration after PCB assembly without removing device or using socket adapters |
Applications
| Industrial PLC I/O Expansion | Automotive ECU Bootloader Storage |
|---|---|
Use Scenario: Adding isolated digital I/O and analog monitoring channels to legacy 8051-based PLC controllers. IC Role / Device Role / Timing Role: Acts as memory-mapped peripheral hub-decodes MCU address space, buffers sensor data in SRAM, and stores calibration tables in EEPROM. Use Value: Reduces BOM count by replacing discrete address decoders, latch ICs, and serial EEPROMs while maintaining deterministic 15 ns read latency. |
Use Scenario: Storing secure bootloader code and vehicle-specific configuration parameters in Tier-1 automotive engine control units. IC Role / Device Role / Timing Role: Provides tamper-resistant nonvolatile storage for signed firmware images and runtime-configurable trim values accessed during cold start. Use Value: Enables over-the-air (OTA) update capability via JTAG without MCU intervention, meeting ISO 26262 ASIL-B functional safety requirements. |
| Medical Device Configuration Manager | Point-of-Sale Terminal Secure Key Vault |
Use Scenario: Managing regulatory-compliant device settings and audit logs in FDA-cleared infusion pumps and diagnostic monitors. IC Role / Device Role / Timing Role: Serves as certified configuration store-EEPROM retains critical calibration constants across power cycles; Flash holds versioned UI assets. Use Value: Achieves 100K write endurance and 10-year data retention at 85°C, satisfying IEC 62304 software lifecycle requirements. |
Use Scenario: Securing cryptographic keys and transaction logs in PCI-DSS compliant payment terminals deployed in retail environments. IC Role / Device Role / Timing Role: Functions as hardware-enforced key repository-EEPROM write-protection bits prevent unauthorized key modification; Flash stores encrypted firmware. Use Value: Meets PCI PTS v6.0 physical security mandates via integrated write-lock fuses and JTAG access restriction mechanisms. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar programmable memory+logic applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD813F2VA-15J | Same architecture but with 2MB primary Flash (doubles program storage capacity); identical pinout and timing | Suitable where larger firmware images or dual-application partitioning is required | Select when firmware size exceeds 1MB or future-proofing for feature expansion is needed |
| ATF1502ASV-15JU | CPLD-only device (no integrated Flash/EEPROM); requires external memory for configuration and data storage | Lacks native nonvolatile storage-requires additional SPI Flash and I²C EEPROM for equivalent functionality | Choose only if logic density needs exceed PSD's PLD capacity and external memory is already present |
Compared with PSD813F2VA-15J, the PSD813F1VA-15J trades half the Flash capacity for lower cost and power; versus ATF1502ASV-15J, it eliminates external memory components and simplifies layout but offers less logic flexibility.
Availability
PSD813F1VA-15J is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive ECU bootloader storage, and medical device configuration management requiring stable component supply across extended product lifecycles.
Supply support for PSD813F1VA-15J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, and programmable logic solutions for industrial, automotive, and consumer markets.
The PSD family was designed specifically to replace discrete memory, logic, and interface components in 8-bit/16-bit MCU systems-enabling single-chip peripheral expansion with integrated Flash, EEPROM, SRAM, and PLD logic.
FAQ
What is the minimum erase cycle endurance for the 64KB EEPROM block?
The secondary EEPROM block guarantees 100,000 erase/write cycles per byte across the full operating temperature range (–40°C to +85°C). Endurance is verified per JEDEC Standard JESD22-A117 and applies to individual byte locations-not sector or block-level limits. Data retention exceeds 10 years at 85°C ambient.
Can the PSD813F1VA-15J operate with a 3.3 V MCU interface?
No-the PSD813F1VA-15J is strictly a 5.0 V ±10% device with TTL-compatible input thresholds and 5 V output drive levels. Interfacing with 3.3 V MCUs requires level-shifting circuitry on all address, data, and control lines (A0–A19, DQ0–DQ7, CE#, OE#, WE#) to prevent damage and ensure signal integrity.
How does JTAG programming interact with active MCU operation?
JTAG programming operates independently of the MCU host-no MCU involvement is required. The PSD813F1VA-15J's TAP controller handles all programming sequences, allowing firmware updates or logic reconfiguration while the MCU executes code from other memory regions. This enables true in-service maintenance without system downtime.
Is the 15 ns access time guaranteed under all operating conditions?
Yes-the 15 ns access time is specified over the full commercial temperature range (0°C to +70°C) and industrial range (–40°C to +85°C) at VCC = 5.0 V ±5%. It includes worst-case propagation delays through address latching, decode logic, and memory array access, validated per JEDEC JESD8-A timing measurement standards.
PSD813F1VA-15J Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 52-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 52-PLCC (19.1x19.1)
- Grade:
- -
- Qualification:
- -
PSD813F1VA-15J FAQ
1.How can I place an order for PSD813F1VA-15J through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD813F1VA-15J on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD813F1VA-15J reliable?
The price and inventory of PSD813F1VA-15J are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD813F1VA-15J is usually 5 days.
3.What payment methods are accepted for PSD813F1VA-15J?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD813F1VA-15J transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD813F1VA-15J?
PSD813F1VA-15J orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD813F1VA-15J order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD813F1VA-15J?
For technical support, including PSD813F1VA-15J datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD813F1VA-15J requirements.
6.How does Aetrix verify that PSD813F1VA-15J is sourced from the original manufacturer or authorized distributors?
All PSD813F1VA-15J products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD813F1VA-15J meets industry standards.
7.What is the process for return or replacement of PSD813F1VA-15J?
All PSD813F1VA-15J units undergo pre-shipment inspection (PSI). If there is an issue with PSD813F1VA-15J, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD813F1VA-15J part is unused and in its original packaging.
Return procedure for PSD813F1VA-15J:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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