STMicroelectronics PSD813F2A-90M

Overview

PSD813F2A-90M from STMicroelectronics is a Flash in-system programmable (ISP) peripheral for 8-bit MCUs, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, JTAG-based ISP, and a CPLD/DPLD logic block with >3000 gates. It serves as a memory and logic expansion companion to legacy 80C51/80C251/68HC11 microcontrollers in industrial control and embedded instrumentation.

For engineers reviewing the PSD813F2A-90M datasheet, PSD813F2A-90M pinout, PSD813F2A-90M application, or PSD813F2A-90M equivalent, this device is selected for MCU address-space expansion via page register, concurrent Flash read/erase operations, PLD-based chip select decoding, and low-cost in-circuit reprogramming using standard JTAG interfaces.

Technical Context

The PSD813F2A-90M implements a tightly coupled architecture where MCU bus signals drive internal memory banks, PLD logic, and I/O configuration registers. Its dual-bank Flash supports simultaneous read from one bank while erasing/writing the other, enabling zero-latency firmware updates without halting MCU execution.

Its integrated PLD comprises two independent blocks: a 16-output macrocell CPLD for glue logic and timing-critical functions, and a user-configurable DPLD for internal chip select decoding - both clocked by the same 90 MHz input and controlled via dedicated configuration registers mapped into the MCU's I/O space.

Key Specifications

Pinout & Package

PSD813F2A-90M is packaged in a 52-pin PQFP (ECOPACK® compliant) with 0.65 mm pitch. Pin assignments follow STMicroelectronics' standardized PLCC52/PQFP52 mapping per Doc ID 7833 Rev 7 Appendix A.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Flash+PLD peripheral applications.

Compared with PSD833F2-90M and PSD853F2-90M, the PSD813F2A-90M offers optimal cost/performance balance for mid-size firmware deployments where full 2 Mbit Flash or hardware reset is unnecessary - preserving design simplicity and minimizing footprint.

Availability

PSD813F2A-90M is available at Aetrix Electronics and suitable for industrial PLCs, legacy MCU-based medical devices, automotive diagnostic tools, and test equipment requiring stable component supply and long-term obsolescence mitigation.

Supply support for PSD813F2A-90M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and memory solutions for industrial, automotive, and consumer markets.

The PSD8XXFX product line was developed specifically to extend the life and capability of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single, JTAG-programmable peripheral - reducing reliance on obsolete discrete glue logic and external memory chips.

FAQ

Is PSD813F2A-90M still in production?

No - PSD813F2A-90M is marked as Obsolete by STMicroelectronics per Doc ID 7833 Rev 7. However, Aetrix Electronics maintains legacy inventory with full traceability and offers extended lifecycle support including cross-reference guidance, second-source validation, and obsolescence mitigation planning for ongoing production programs.

What MCU families are directly supported?

The PSD813F2A-90M natively interfaces with 80C51, 80C251, 80C51XA, and 68HC11 microcontrollers, as confirmed by dedicated interface examples in Sections 15.5–15.8 of the datasheet. Bus timing, control signal polarity, and address/data multiplexing modes are preconfigured for these architectures.

Can the PLD logic be reprogrammed in the field?

Yes - the CPLD and DPLD blocks are fully reconfigurable via the JTAG interface without requiring device removal. Configuration bitstreams are stored in the secondary Flash memory and loaded automatically at power-up, enabling field updates of address decoding, interrupt routing, and peripheral enable logic.

Does it support 3.3 V operation?

No - PSD813F2A-90M is a 5 V-only device, specified for VCC = 4.5 V to 5.5 V per Table 40 (Operating Conditions). It lacks 3 V core logic or I/O voltage tolerance; interfacing with 3.3 V MCUs requires level-shifting on address, data, and control lines.