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STMicroelectronics PSD813F2A-90MI
- Part No.:
- PSD813F2A-90MI
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 52-QFP
- Datasheet:
-
PSD813F2A-90MI.pdf
- Description:
- IC PROG PERIPH IC 52PQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,561
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Product details
Overview
PSD813F2A-90MI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, and a 3000-gate PLD with CPLD/DPLD architecture. It supports concurrent read/erase/write operations and operates at 5 V with 90 ns access time, deployed in legacy industrial control systems interfacing with 80C51XA and 68HC11 MCUs.
For engineers reviewing the PSD813F2A-90MI datasheet, PSD813F2A-90MI pinout, PSD813F2A-90MI application, or PSD813F2A-90MI equivalent, key selection considerations include ISP JTAG support, dual-bank Flash concurrency, PLD-based chip select decoding, and 5 V bus timing compatibility with multiplexed/non-multiplexed 8-bit MCUs.
Technical Context
This device implements a tightly coupled memory-peripheral architecture where the primary Flash (8 × 32K × 8) and secondary Flash (4 × 64K × 8) operate independently under shared JTAG control, enabling background erase while foreground execution occurs. The integrated page register expands MCU address space by 256× via bank switching.
The PLD subsystem comprises two distinct logic blocks: a 16-output macrocell CPLD for glue logic and I/O control, and a user-configurable DPLD for internal chip select decoding-both clocked synchronously and supporting Turbo Bit acceleration for critical timing paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Memory | 1 Mbit (8 uniform sectors × 32K × 8); enables firmware partitioning and field-upgradable code banks. |
| Secondary Flash Memory | 256 Kbit (4 uniform sectors × 64K × 8); used for configuration data, boot loader, or parameter storage. |
| SRAM Capacity | 256 Kbit (32K × 8); provides fast scratchpad memory accessible in same bus cycle as Flash. |
| Access Time | 90 ns at VCC = 5.0 V; meets timing requirements for 80C51XA and 68HC11 systems running at ≤11 MHz. |
| I/O Ports | 27 reconfigurable pins; 16 support open-drain mode for wired-OR bus arbitration and level translation. |
| PLD Logic Density | 3000 equivalent gates; sufficient for replacing discrete 74-series logic and custom address decoders. |
| JTAG Interface | IEEE 1149.1-compliant serial port; enables full-chip ISP without removing device from PCB. |
Pinout & Package
PSD813F2A-90MI is housed in a 52-pin Plastic Quad Flat Package (PQFP52), RoHS-compliant and ECOPACK® certified. Pin assignments follow ST's standard layout for PSD8XXFX series with dedicated JTAG (TCK/TMS/TDI/TDO), MCU bus interface (AD0–AD7, ALE, RD, WR, CS), PLD I/O (PLD_IO0–PLD_IO15), and power/ground distribution optimized for noise immunity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AD0–AD7 | Address/Data Multiplexed Bus | Bi-directional 8-bit bus sharing address latching (ALE) and data transfer; compatible with 80C51XA and 68HC11 timing. |
| ALE | Address Latch Enable | Controls external latch to demultiplex AD0–AD7 into separate address and data phases. |
| RD / WR | Read/Write Control | Active-low strobes synchronized to MCU clock; define memory access direction and timing window. |
| CS (PD2) | Chip Select Input | Enables PSD only when asserted; supports hierarchical memory mapping with other peripherals. |
| TCK/TMS/TDI/TDO | JTAG Test Access Port | Provides boundary-scan testability and in-system programming without dedicated programming hardware. |
| PLD_IO0–PLD_IO15 | PLD I/O Macrocell Pins | Configurable as inputs, outputs, or bidirectional signals; driven by CPLD logic or DPLD decode outputs. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank Flash concurrency | Allows real-time firmware update: execute from primary bank while erasing/writing secondary bank-no system halt required. |
| Page register expansion | Extends 16-bit MCU address space to 24-bit (64K × 256) via software-controlled bank switching for large memory maps. |
| Reconfigurable I/O architecture | Each of 27 pins supports MCU I/O, PLD I/O, latched address output, or special function roles-configured per application. |
| PLD-based chip select decoding | DPLD block replaces discrete logic for generating CS signals for multiple peripherals, reducing BOM count and board area. |
| Programmable power management | Automatic Power-down (APD) unit reduces current to 10 µA during idle; configurable via PMMR registers. |
Applications
| Industrial PLC I/O Expansion | Legacy MCU-Based HMI Controller |
|---|---|
Use Scenario: Adding non-volatile program storage and logic decoding to an 80C251-based programmable logic controller with limited on-chip resources. IC Role / Device Role / Timing Role: Acts as unified memory + glue logic hub: stores ladder logic firmware in primary Flash, configures I/O expansion via DPLD, and handles address decoding for analog input modules. Use Value: Eliminates need for external EPROM, GAL, and address decoder ICs-reducing component count by ≥4 and improving field-upgrade capability. |
Use Scenario: Upgrading a 68HC11-based human-machine interface panel to support dynamic screen layouts and localized language packs. IC Role / Device Role / Timing Role: Provides secondary Flash for storing GUI bitmaps and fonts, SRAM for runtime display buffer, and CPLD for managing LCD controller handshaking signals. Use Value: Enables over-the-air UI updates without MCU firmware rewrite; 90 ns access ensures no frame-drop during bitmap rendering. |
| Medical Instrument Boot Loader | Automotive Body Control Module |
Use Scenario: Implementing secure, field-upgradable boot loader in a Class II medical device using 80C51XA MCU with strict revision control. IC Role / Device Role / Timing Role: Hosts signed boot image in protected Flash sector; verifies integrity before loading application code into RAM; uses JTAG for factory provisioning. Use Value: Meets IEC 62304 traceability requirements; sector protection prevents accidental overwrite of validated boot code. |
Use Scenario: Replacing discrete logic in a 12 V automotive body control module interfacing with LIN transceivers and relay drivers. IC Role / Device Role / Timing Role: Manages multi-peripheral chip selects (LIN PHY, EEPROM, CAN transceiver), latches sensor addresses, and implements watchdog reset logic in CPLD. Use Value: Reduces thermal stress vs. discrete logic; ECOPACK® package ensures compliance with automotive RoHS and ELV directives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash+PLD peripheral applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD833F2-90MI | 2 Mbit primary Flash (vs. 1 Mbit); identical PLD, SRAM, and pinout. | Supports larger firmware images; requires no PCB change but increases cost and power draw. | Select when firmware size exceeds 1 Mbit and upgrade path must retain same footprint. |
| PSD813F4-90MI | Same Flash/SRAM capacity but adds 2× more PLD macrocells (32 OMCs vs. 16) and enhanced DPLD routing. | Better suited for complex address decoding across >8 peripherals; higher static current (15 mA vs. 12 mA). | Choose when additional PLD logic is needed for multi-chip select arbitration or state-machine offload. |
Compared with PSD833F2-90MI and PSD813F4-90MI, the PSD813F2A-90MI offers optimal balance of Flash density, PLD capacity, and power efficiency for mid-complexity 8-bit MCU systems where cost and thermal envelope are constrained.
Availability
PSD813F2A-90MI is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, legacy MCU-based HMI controllers, medical instrument boot loaders, and automotive body control modules requiring stable component supply and long-term obsolescence management.
Supply support for PSD813F2A-90MI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and memory solutions for industrial, automotive, and consumer markets.
The PSD8XXFX product line was engineered specifically to extend the life and capability of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single, JTAG-programmable peripheral-targeting cost-sensitive, high-reliability embedded upgrades.
FAQ
Is PSD813F2A-90MI pin-compatible with other PSD8XXFX variants?
Yes-PSD813F2A-90MI shares identical PQFP52 pinout with all PSD8XXFX family members including PSD833F2 and PSD813F4. Signal names, electrical characteristics, and timing parameters are fully aligned across the series, enabling drop-in replacement where Flash/PLD capacity permits.
What JTAG tools support in-system programming of PSD813F2A-90MI?
The device is programmed using ST's FlashLINK cable and PSDSoft development software, which implements IEEE 1149.1 JTAG protocol with vendor-specific extensions for Flash erase/write and PLD configuration. Third-party JTAG adapters compliant with boundary-scan TAP controller operation can also be used with custom scripting.
How does the dual-bank Flash architecture improve system reliability?
By isolating primary and secondary Flash banks, the device allows firmware validation in secondary Flash before switching execution-eliminating risk of bricking during field updates. Concurrent operation ensures zero downtime: active code runs from one bank while the other is erased or reprogrammed under JTAG control.
Can the PLD logic be reconfigured independently of Flash contents?
Yes-the CPLD and DPLD logic configurations are stored separately in dedicated Flash sectors and loaded at power-on reset. PLD bitstream updates do not affect Flash memory contents or SRAM data, and can be performed via JTAG without interrupting MCU operation or erasing application code.
PSD813F2A-90MI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 52-QFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 52-PQFP (10x10)
- Grade:
- -
- Qualification:
- -
PSD813F2A-90MI FAQ
1.How can I place an order for PSD813F2A-90MI through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD813F2A-90MI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD813F2A-90MI reliable?
The price and inventory of PSD813F2A-90MI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD813F2A-90MI is usually 5 days.
3.What payment methods are accepted for PSD813F2A-90MI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD813F2A-90MI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD813F2A-90MI?
PSD813F2A-90MI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD813F2A-90MI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD813F2A-90MI?
For technical support, including PSD813F2A-90MI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD813F2A-90MI requirements.
6.How does Aetrix verify that PSD813F2A-90MI is sourced from the original manufacturer or authorized distributors?
All PSD813F2A-90MI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD813F2A-90MI meets industry standards.
7.What is the process for return or replacement of PSD813F2A-90MI?
All PSD813F2A-90MI units undergo pre-shipment inspection (PSI). If there is an issue with PSD813F2A-90MI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD813F2A-90MI part is unused and in its original packaging.
Return procedure for PSD813F2A-90MI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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