My Inquiry
My Account
STMicroelectronics PSD813F2A-90UI
- Part No.:
- PSD813F2A-90UI
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 64-LQFP
- Datasheet:
-
PSD813F2A-90UI.pdf
- Description:
- IC PROG PERIPH IC 64TQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,360
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PSD813F2A-90UI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, and a hybrid PLD (CPLD + DPLD) with >3000 gates. It supports concurrent read/erase/write operations and operates at 5 V with 90 ns access time.
For engineers reviewing the PSD813F2A-90UI datasheet, PSD813F2A-90UI pinout, PSD813F2A-90UI application, or PSD813F2A-90UI equivalent, this device serves as a memory expansion and logic integration solution for legacy 8-bit MCU systems including 80C51XA, 80C251, and 68HC11 platforms requiring nonvolatile configuration, address space extension via page register, and in-field firmware updates.
Technical Context
The PSD813F2A-90UI implements a tightly coupled architecture where the dual-bank Flash enables background erase/write while executing code from the other bank. Its PLD subsystem includes a 16-output macrocell CPLD and a user-defined decode PLD (DPLD) for chip-select generation and glue logic replacement.
It interfaces via an 8-bit multiplexed or non-multiplexed bus, supports JTAG-based ISP using a low-cost FlashLINK cable, and features programmable power management including Automatic Power-down (APD) mode triggered by MCU bus inactivity. The internal page register expands the MCU's 16-bit address space to 24-bit addressing capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Memory | 1 Mbit (8 × 128Kb uniform sectors); enables firmware partitioning and field-upgradable boot/code regions. |
| Secondary Flash Memory | 256 Kbit (4 × 64Kb uniform sectors); used for parameter storage, calibration data, or secure configuration. |
| SRAM Capacity | 256 Kbit (32K × 8); provides fast, volatile working memory accessible at same bus timing as Flash. |
| Access Time | 90 ns; ensures compatibility with 80C51XA and 68HC11 MCUs running at up to 12 MHz system clock. |
| I/O Ports | 27 reconfigurable pins; support MCU I/O, PLD I/O, latched address output, and open-drain operation (16 pins). |
| PLD Logic Density | >3000 gates; integrates CPLD (16 OMCs, 24 IMCs) and DPLD for custom chip-select decoding and state-machine logic. |
| JTAG Interface | IEEE 1149.1-compliant serial port; enables full-chip in-system programming without socket removal or UV erasure. |
Pinout & Package
PSD813F2A-90UI is housed in a 52-pin PLCC (Plastic Leaded Chip Carrier) package compliant with ECOPACK® environmental standards. Pin assignments follow STMicroelectronics' PLCC52 layout per Appendix B of Doc ID 7833 Rev 7.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power Supply | +5 V supply for core logic and I/O; requires local decoupling per datasheet guidelines. |
| GND | Ground Reference | Digital ground return path; separate analog ground not required. |
| A0–A15 | Address Inputs | 16-bit address bus interface; supports both multiplexed and non-multiplexed MCU configurations. |
| D0–D7 | Data Bus | 8-bit bidirectional data path; compatible with standard 8-bit MCU data buses. |
| RD, WR, CS | Control Signals | Standard read/write/chip-select inputs; timing aligned to 80C51XA and 68HC11 protocols. |
| TCK, TMS, TDI, TDO | JTAG Interface | IEEE 1149.1 boundary-scan signals routed to Port C pins; enable in-system programming and debug. |
| PC3 (RDY/BSY) | Status Output | Indicates Flash busy during erase/write; used for polling or interrupt-driven operation. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank Flash concurrency | Enables real-time firmware update without halting MCU execution-read from Bank A while erasing/writing Bank B. |
| Page register (256× expansion) | Extends 16-bit MCU address space to 24-bit, allowing access to full Flash/SRAM capacity without external logic. |
| Reconfigurable I/O architecture | 27 pins support dynamic mode switching (MCU I/O, PLD I/O, latched address, open-drain) via PCR registers. |
| Integrated DPLD decoding | Eliminates discrete address decoders; user-configurable chip-select logic reduces BOM count and PCB area. |
| JTAG ISP with FlashLINK | Enables low-cost, high-volume manufacturing programming and field firmware updates without specialized hardware. |
Applications
| Industrial Control Panel | Legacy Automotive ECU |
|---|---|
|
Use Scenario: Retrofitting aging 80C51-based control panels with expanded firmware storage and runtime reconfiguration. IC Role / Device Role / Timing Role: Memory and logic co-processor providing extended Flash, SRAM, and custom address decoding for sensor I/O expansion. Use Value: Eliminates need for external EPROM sockets and discrete PALs, reducing board complexity and enabling over-the-air firmware patches via JTAG. |
Use Scenario: Upgrading 68HC11-based engine control units to support additional calibration tables and diagnostics. IC Role / Device Role / Timing Role: Nonvolatile memory hub with concurrent Flash operation and PLD-based signal conditioning for CAN interface glue logic. Use Value: Enables safe in-field calibration updates without engine shutdown; DPLD replaces 3–5 discrete logic ICs in signal routing path. |
| Medical Instrument Bootloader | Point-of-Sale Terminal Firmware Manager |
|
Use Scenario: Secure bootloader implementation in Class II medical devices requiring certified firmware integrity and rollback capability. IC Role / Device Role / Timing Role: Dual-bank Flash controller with sector protection and page-register-enabled secure boot vector mapping. Use Value: Supports A/B firmware partitioning and cryptographic signature verification in SRAM before Flash commit-meeting IEC 62304 requirements. |
Use Scenario: Enabling remote firmware upgrades in embedded POS terminals based on 80C251 architecture. IC Role / Device Role / Timing Role: In-system programmable memory peripheral with JTAG-accessible Flash and SRAM for OTA update staging. Use Value: Reduces service downtime by allowing field technicians to reprogram via USB-JTAG adapter-no chip replacement needed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash+PLD peripheral applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD833F2-90J | 2 Mbit primary Flash (vs. 1 Mbit), same PLD architecture and pinout; higher density but larger die size. | Requires identical PCB footprint and software drivers; suitable when >1 Mbit firmware image size is required. | Select when firmware growth exceeds 1 Mbit and existing layout allows same PLCC52 package. |
| PSD853F2-90J | Includes reset signal input (RESET) and enhanced power-down modes; otherwise functionally identical to PSD813F2A-90UI. | Required only if system-level warm reset coordination or deeper sleep current optimization (<10 µA) is mandatory. | Choose only if RESET pin integration or sub-50 µA standby current is critical-adds no benefit otherwise. |
Compared with PSD833F2-90J and PSD853F2-90J, the PSD813F2A-90UI offers optimal cost/performance balance for fixed 1 Mbit firmware images, avoids unnecessary Flash overhead, and maintains full software compatibility without requiring reset signal routing or ultra-low-power design constraints.
Availability
PSD813F2A-90UI is available at Aetrix Electronics and suitable for industrial control panels, legacy automotive ECUs, and medical instrument bootloader systems requiring stable component supply and long-term obsolescence mitigation.
Supply support for PSD813F2A-90UI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management, and memory solutions for industrial, automotive, and consumer markets.
The PSD8XXFX product line was developed specifically to extend the life of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single ISP-capable peripheral-reducing reliance on obsolete discrete components and simplifying legacy system upgrades.
FAQ
Is PSD813F2A-90UI still in production?
No-PSD813F2A-90UI is marked as Obsolete by STMicroelectronics per Doc ID 7833 Rev 7. However, Aetrix Electronics maintains verified legacy stock with full traceability, conforming to original ST specifications and ECOPACK® packaging standards. No functional revisions or second sources exist.
What MCU families are directly supported?
The device natively supports 80C31, 80C251, 80C51XA, and 68HC11 MCUs via dedicated interface timing and control signal mapping documented in Sections 15.5–15.8 of the datasheet. Configuration registers allow fine-tuning for bus setup/hold times and wait-state insertion.
Can the PLD logic be reprogrammed in-circuit?
Yes-the CPLD and DPLD logic configurations are stored in the secondary Flash memory and reprogrammed via JTAG using ST's FlashLINK utility. No external hardware programmer is needed; all PLD fuse maps and macrocell definitions are updated alongside firmware images.
Does it support 3 V operation?
No-PSD813F2A-90UI is a 5 V-only device (VCC = 4.5–5.5 V). It is not compatible with 3 V MCUs or mixed-voltage interfaces. For 3 V operation, ST offered separate PSD8XXFX-3V variants (e.g., PSD813F2-3V), which differ in AC/DC parameters and are not pin-compatible.
PSD813F2A-90UI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 64-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-TQFP (14x14)
- Grade:
- -
- Qualification:
- -
PSD813F2A-90UI FAQ
1.How can I place an order for PSD813F2A-90UI through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD813F2A-90UI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD813F2A-90UI reliable?
The price and inventory of PSD813F2A-90UI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD813F2A-90UI is usually 5 days.
3.What payment methods are accepted for PSD813F2A-90UI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD813F2A-90UI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD813F2A-90UI?
PSD813F2A-90UI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD813F2A-90UI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD813F2A-90UI?
For technical support, including PSD813F2A-90UI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD813F2A-90UI requirements.
6.How does Aetrix verify that PSD813F2A-90UI is sourced from the original manufacturer or authorized distributors?
All PSD813F2A-90UI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD813F2A-90UI meets industry standards.
7.What is the process for return or replacement of PSD813F2A-90UI?
All PSD813F2A-90UI units undergo pre-shipment inspection (PSI). If there is an issue with PSD813F2A-90UI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD813F2A-90UI part is unused and in its original packaging.
Return procedure for PSD813F2A-90UI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PSD813F2A-90UI Tags
-
CAP200DG-TL
Power Integrations
-
ATSHA204A-MAHDA-T
Microchip Technology
-
ATSHA204A-SSHDA-T
Microchip Technology
-
ATSHA204A-STUCZ-T
Microchip Technology
-
ATECC608B-MAHDA-T
Microchip Technology
-
ATECC608B-MAHCZ-S
Microchip Technology
-
ATECC608B-SSHDA-T
Microchip Technology
-
ATECC608B-MAHDA-S
Microchip Technology
-
ATECC608A-MAHDA-S
Microchip Technology
-
ATECC608B-MAVDA-T
Microchip Technology
-
ATECC608A-SSHDA-T
Microchip Technology
-
ATECC508A-MAHDA-T
Microchip Technology
Tech Hub
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…
Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…
Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.
18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…
Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…
Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…
A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…
Engineering guide to Raspberry Pi alternatives, covering chip-level differences, Orange Pi, ROCK, Jetson, Banana Pi, NanoPi, Compute Module, Pico, GPIO, camera, HAT compatibility, and replacement risks…
