STMicroelectronics PSD813F2VA-15J

Overview

PSD813F2VA-15J from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, JTAG ISP interface, and PLD logic (3000+ gates, 16 OMCs, 24 IMCs). It operates at 5 V and supports concurrent read/erase/write across memory banks in embedded MCU systems requiring flexible memory expansion and glue logic.

For engineers reviewing the PSD813F2VA-15J datasheet, PSD813F2VA-15J pinout, PSD813F2VA-15J application, or PSD813F2VA-15J equivalent, this device serves as a unified memory + logic co-processor for legacy 8-bit MCUs (e.g., 80C51XA, 68HC11), enabling address space expansion via page register, configurable chip select decoding, and in-circuit reprogramming without socket removal.

Technical Context

The PSD813F2VA-15J implements a tightly coupled architecture where the MCU bus interface (multiplexed/non-multiplexed 8-bit) directly controls Flash, SRAM, and PLD blocks via dedicated decode logic. Its dual-bank Flash enables background erase/write while executing code from the other bank - critical for field-upgradable firmware in industrial controllers.

PLD functionality is split between a Decode PLD (DPLD) for user-defined chip select generation and a Complex PLD (CPLD) with 16 output macrocells supporting combinational or registered logic. The integrated JTAG port provides full boundary-scan and ISP capability, eliminating need for external programming hardware beyond a low-cost FlashLINK cable.

Key Specifications

Pinout & Package

PSD813F2VA-15J is housed in a 52-pin PLCC (Plastic Leaded Chip Carrier) package, RoHS-compliant and ECOPACK® certified. Pin assignments follow STMicroelectronics' PLCC52 standard layout per Appendix B of Doc ID 7833 Rev 7.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Flash+PLD peripheral applications.

Compared with PSD833F2VA-15J, the PSD813F2VA-15J trades primary Flash capacity for lower cost and smaller die area, while PSD813F4VA-15J adds security features without altering memory bandwidth or PLD resources - making the -15J variant optimal for cost-sensitive, non-secure embedded upgrades.

Availability

PSD813F2VA-15J is available at Aetrix Electronics and suitable for industrial PLC I/O modules, legacy MCU-based medical devices, and automotive body control units requiring stable component supply and long-lifecycle support.

Supply support for PSD813F2VA-15J includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog/mixed-signal products for industrial, automotive, and consumer markets.

The PSD8XXFX family was developed specifically to extend the lifespan of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single ISP-capable device - targeting cost-sensitive, high-reliability embedded systems with constrained PCB space.

FAQ

Is PSD813F2VA-15J still in production?

No - PSD813F2VA-15J is marked as Obsolete by STMicroelectronics per Doc ID 7833 Rev 7. However, Aetrix Electronics maintains legacy inventory with full traceability and offers extended lifecycle support including obsolescence forecasting, cross-reference assistance, and last-time-buy coordination for ongoing production runs.

What MCU families are natively supported?

The device supports 80C31, 80C251, 80C51XA, and 68HC11 MCUs via documented bus interface configurations in Sections 15.5–15.8 of the datasheet. Each MCU type has verified timing diagrams, control signal mappings, and wait-state settings - no FPGA or custom logic required for integration.

Can the PLD logic be reprogrammed independently of Flash memory?

Yes - the CPLD and DPLD blocks are programmed separately via JTAG using distinct configuration bitstreams. The PLD logic retains its function during Flash erase/write cycles, and changes to PLD logic do not affect Flash contents or SRAM data - enabling dynamic peripheral reconfiguration without system reset.

Does it support 3 V operation?

No - PSD813F2VA-15J is specified only for 5 V operation (VCC = 4.5–5.5 V) per Table 40 in the datasheet. It is not compatible with 3 V MCUs or mixed-voltage systems; for 3 V designs, ST's PSD8XXFX-3V variants (e.g., PSD813F2V3-15J) must be used instead.