STMicroelectronics PSD813F2VA-20JI

Overview

PSD813F2VA-20JI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, and a hybrid PLD (CPLD + DPLD) with >3000 gates. It supports concurrent read/erase/write operations and features an internal page register for 256× address space expansion. Used in legacy 80C51/80C251/68HC11-based embedded control systems requiring field-upgradable firmware and flexible logic decoding.

For engineers reviewing the PSD813F2VA-20JI datasheet, PSD813F2VA-20JI pinout, PSD813F2VA-20JI application, or PSD813F2VA-20JI equivalent, this device serves as a unified memory+logic+I/O co-processor for 8-bit MCU bus expansion-key selection factors include its 5 V operation, JTAG ISP capability, dual Flash bank concurrency, PLD macrocell count, and PQFP52 package compatibility with legacy PCB footprints.

Technical Context

The PSD813F2VA-20JI implements a tightly coupled architecture where the MCU bus interface (multiplexed or non-multiplexed 8-bit) directly controls Flash, SRAM, and PLD resources via dedicated decode logic. Its dual Flash banks enable background erase/write while foreground code execution continues from the active bank.

The integrated PLD comprises two distinct blocks: a 16-output CPLD for glue logic and timing-critical functions, and a user-configurable DPLD for chip-select decoding and address mapping. All 27 I/O pins are software-reconfigurable per port-supporting MCU I/O, PLD I/O, latched address output, or special function roles-with 16 pins capable of open-drain drive.

Key Specifications

Pinout & Package

PQFP52 (Plastic Quad Flat Package, 52-pin, 10 × 10 mm body, 0.65 mm pitch) per STMicroelectronics Doc ID 7833 Rev 7, Appendix A.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Flash+PLD+memory peripheral applications.

Compared with PSD833F2-20JI and PSD853F2-20JI, the PSD813F2VA-20JI offers optimal cost/performance balance for mid-size firmware deployments where 1 Mbit Flash suffices and explicit reset control is handled externally-preserving design simplicity and minimizing BOM overhead.

Availability

PSD813F2VA-20JI is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, legacy 8051-based medical devices, and automotive body control modules requiring stable component supply and long-term obsolescence mitigation.

Supply support for PSD813F2VA-20JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and memory solutions for industrial, automotive, and consumer markets.

The PSD8XXFX product line was developed specifically to extend the life of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single, JTAG-programmable peripheral-targeting cost-sensitive, long-lifecycle embedded systems where ASIC replacement is impractical.

FAQ

Is PSD813F2VA-20JI still in production or considered obsolete?

PSD813F2VA-20JI is marked as Obsolete by STMicroelectronics per Doc ID 7833 Rev 7, but Aetrix Electronics maintains active inventory and extended-life supply channels for this part. We provide traceable, factory-new units with full documentation and support for legacy design refresh and repair programs-no counterfeit or remarked material is distributed.

What development tools are required to program the Flash and PLD sections?

Programming requires ST's FlashLINK JTAG cable and PSDSoft development software (v3.x or later), which supports Flash erase/write, PLD fuse map loading, and register configuration. The JTAG interface operates at standard 5 V levels and is fully compatible with third-party boundary-scan tools that support IEEE 1149.1 and ST's proprietary instruction set extensions.

Can the PSD813F2VA-20JI interface directly with a 3.3 V MCU?

No-the PSD813F2VA-20JI is a 5 V-only device (VCC = 4.5–5.5 V) with TTL-compatible I/O thresholds. Direct connection to 3.3 V MCUs risks overvoltage damage and logic-level mismatch. Level-shifting buffers (e.g., TXB0108) or voltage translators are required for safe interfacing with 3.3 V buses.

How is the page register used to expand the MCU address space?

The 8-bit page register resides at a fixed internal address and is written by the MCU before each memory access. Its value selects one of 256 pages, combining with the MCU's 16-bit address to form a 24-bit effective address-allowing access to up to 16 MB of total memory space across Flash, SRAM, and PLD configuration registers.