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STMicroelectronics PSD834F2-90MI
- Part No.:
- PSD834F2-90MI
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 52-QFP
- Datasheet:
-
PSD834F2-90MI.pdf
- Description:
- IC PROG PERIPH IC 52PQFP
- Quantity:
- Payment:
- Shipping:
Inventory:4,124
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Product details
Overview
PSD834F2-90MI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral for 8-bit microcontrollers, integrating dual-bank Flash (1 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, JTAG-based ISP, and PLD logic (3000+ gates, 16 OMCs/24 IMCs). It serves as a memory expansion and glue-logic replacement in legacy 80C51, 80C251, and 68HC11 systems.
For engineers reviewing the PSD834F2-90MI datasheet, PSD834F2-90MI pinout, PSD834F2-90MI application, or PSD834F2-90MI equivalent, key selection factors include concurrent Flash read/erase capability, page register–enabled 256× address space expansion, PLD-configurable chip select decoding, and 5 V operation with ECOPACK® TQFP64 packaging.
Technical Context
The PSD834F2-90MI implements a tightly coupled architecture where MCU bus interface signals (ALE, RD, WR, CS) directly control Flash/SRAM access timing and PLD configuration. Its dual-bank Flash enables background erase/write while executing code from the alternate bank - critical for field-upgradable firmware in industrial controllers.
PLD functionality is split between a Decode PLD (DPLD) handling user-defined chip select generation and a Complex PLD (CPLD) supporting synchronous/asynchronous macrocell operations with Turbo Bit acceleration. The JTAG port provides full boundary-scan and in-system programming without requiring external high-voltage signals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Memory | 1 Mbit (8 × 128 Kbit uniform sectors); supports sector erase, bulk erase, and suspend/resume operations. |
| Secondary Flash Memory | 256 Kbit (4 × 64 Kbit uniform sectors); independent erase/write from primary bank for data logging or parameter storage. |
| SRAM Capacity | 256 Kbit (32 K × 8); battery-backed or volatile operation; accessible via same MCU bus interface as Flash. |
| I/O Ports | 27 reconfigurable pins; 16 support open-drain mode; configurable as MCU I/O, PLD I/O, latched address outputs, or special function signals. |
| PLD Logic | 3000+ equivalent gates; CPLD with 16 output macrocells (OMCs) and 24 input macrocells (IMCs); DPLD for internal chip select decoding. |
| Page Register | 8-bit internal register enabling 256× expansion of MCU address space; eliminates need for external address latches in extended memory maps. |
| JTAG Interface | IEEE 1149.1-compliant serial port; enables full-chip ISP, boundary-scan testing, and real-time register access during system operation. |
Pinout & Package
PSD834F2-90MI is housed in a 64-pin TQFP (Thin Quad Flat Package) with 0.5 mm pitch, ECOPACK®-compliant lead-free finish. Pin assignments follow STMicroelectronics' TQFP64 mechanical specification (Doc ID 7833 Rev 7, Appendix C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC, VSS | Power supply / Ground | 5 V ±10% core supply; separate analog/digital ground not required; decoupling mandatory per datasheet layout guidelines. |
| A0–A15 | Address inputs | 16-bit multiplexed or non-multiplexed address bus interface; compatible with 80C51, 80C251, and 68HC11 addressing modes. |
| D0–D7 | Data bus | 8-bit bidirectional data path; supports byte enable (BE) control for partial writes to Flash/SRAM. |
| RD, WR, ALE, CS | Bus control | Standard 8-bit MCU control signals; RD/WR timing aligns with 90 ns access requirement; CS enables device selection. |
| TCK, TMS, TDI, TDO | JTAG interface | Boundary-scan and ISP signals routed to Port C pins (PC0–PC3); no external pull-ups required per JTAG spec. |
| P0A–P3D | Reconfigurable I/O | 27 total I/Os across Ports A–D; each pin individually configurable via PCR/DDR registers for direction, drive strength, and function mode. |
Key Features
| Feature | Design Value |
|---|---|
| Concurrent Flash operation | Read from one Flash bank while erasing/writing the other - enables zero-downtime firmware updates in embedded systems. |
| Page register address extension | Expands 16-bit MCU address space to 24-bit (64 MB) using internal 8-bit page register - reduces external logic count in memory-mapped designs. |
| PLD-based chip select decoding | DPLD allows user-defined decoding of address/control signals into up to 16 chip selects - replaces discrete logic or CPLDs in legacy MCU systems. |
| JTAG in-system programming | Eliminates need for UV erasers or high-voltage programmers; supports production-line programming via low-cost FlashLINK cable and PC host. |
| Programmable power management | Automatic Power-down (APD) unit triggers sleep mode after configurable idle time; reduces active current from 60 mA to 100 µA typical. |
Applications
| Industrial PLC I/O Expansion | Legacy MCU Firmware Upgrade Module |
|---|---|
Use Scenario: Adding nonvolatile program storage and configurable I/O to an aging 80C51-based programmable logic controller. IC Role / Device Role / Timing Role: Acts as unified memory + glue logic replacement - hosts firmware in primary Flash, stores configuration in secondary Flash, and generates chip selects for add-on modules. Use Value: Eliminates 74-series logic and external EPROM sockets; enables field firmware updates via JTAG without board redesign. |
Use Scenario: Enabling over-the-air (OTA) update capability in a 68HC11-based motor drive controller with no native Flash support. IC Role / Device Role / Timing Role: Provides concurrent Flash execution and background write - runs active firmware from Bank A while writing new image to Bank B. Use Value: Achieves <100 ms firmware switchover; avoids system reset during update - critical for motion-critical applications. |
| Medical Device Parameter Storage | Automotive Body Control Unit (BCU) |
Use Scenario: Storing calibration data, usage logs, and safety-critical thresholds in a Class II medical infusion pump. IC Role / Device Role / Timing Role: Secondary Flash holds tamper-resistant, sector-protected parameters; SRAM buffers real-time sensor data before Flash commit. Use Value: Sector protection prevents accidental overwrite; JTAG lock disables unauthorized reprogramming - meets IEC 62304 traceability requirements. |
Use Scenario: Replacing discrete logic and EEPROM in a 1990s-era automotive BCU built around 80C251. IC Role / Device Role / Timing Role: CPLD implements custom wake-up logic and CAN message filtering; Flash stores variant-specific configuration tables. Use Value: Reduces component count by 12 parts; supports EOL manufacturing continuity for discontinued MCUs with identical pinout compatibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash+PLD peripheral applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD854F2-90MI | 2 Mbit primary Flash (vs. 1 Mbit), same 256 Kbit secondary Flash and PLD resources; identical TQFP64 package and pinout. | Supports larger firmware images; requires no PCB change but increases cost and power draw in memory-constrained designs. | Select when firmware size exceeds 1 Mbit and board layout cannot be modified. |
| PSD833F2-90MI | 512 Kbit primary Flash (vs. 1 Mbit); otherwise identical SRAM, PLD, I/O, and timing specs; pin-compatible TQFP64 package. | Suitable for smaller bootloaders or fixed-function firmware; lower cost and reduced erase/write time vs. PSD834F2. | Select for cost-sensitive applications with stable, compact code - avoids over-provisioning Flash capacity. |
Compared with PSD834F2-90MI, PSD854F2-90MI offers double primary Flash for future-proofing at higher cost and power, while PSD833F2-90MI trades capacity for lower BOM cost and faster erase cycles - all maintain identical PLD logic, I/O flexibility, and JTAG ISP workflow.
Availability
PSD834F2-90MI is available at Aetrix Electronics and suitable for industrial PLC upgrades, legacy MCU firmware modernization, and medical device parameter storage requiring stable component supply and long-term lifecycle support.
Supply support for PSD834F2-90MI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog/mixed-signal products for industrial, automotive, and consumer markets.
The PSD8XXFX family was developed specifically to extend the life of 8-bit MCU platforms by integrating Flash memory, SRAM, and programmable logic into a single, JTAG-programmable device - targeting design reuse in cost-sensitive, long-lifecycle industrial applications.
FAQ
Is PSD834F2-90MI still in production?
No - PSD834F2-90MI is marked as Obsolete by STMicroelectronics (Doc ID 7833 Rev 7, Table 1). However, Aetrix Electronics maintains verified legacy stock with full traceability, conforming to original ST specifications, and supports extended lifecycle procurement for existing designs.
What MCU families does PSD834F2-90MI directly support?
It natively interfaces with 80C51XA, 80C251, 80C31, and 68HC11 microcontrollers via documented bus timing and control signal mappings (Sections 15.5–15.8, Doc ID 7833). No FPGA or software driver is needed - hardware-level compatibility is achieved through dedicated MCU bus interface logic.
Can the PLD logic be reprogrammed in the field?
Yes - both the CPLD and DPLD blocks are fully reconfigurable via JTAG using ST's FlashLINK tools. Configuration bitstreams are stored in Flash and loaded automatically at power-up; no external configuration PROM is required.
Does PSD834F2-90MI support 3 V operation?
No - PSD834F2-90MI is a 5 V-only device (Operating Conditions Table 40, Doc ID 7833). It is not compatible with 3 V MCUs or mixed-voltage systems without level-shifting; the -90MI speed grade specifies 90 ns access time at VCC = 5.0 V ±10%.
PSD834F2-90MI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 52-QFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 52-PQFP (10x10)
- Grade:
- -
- Qualification:
- -
PSD834F2-90MI FAQ
1.How can I place an order for PSD834F2-90MI through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD834F2-90MI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD834F2-90MI reliable?
The price and inventory of PSD834F2-90MI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD834F2-90MI is usually 5 days.
3.What payment methods are accepted for PSD834F2-90MI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD834F2-90MI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD834F2-90MI?
PSD834F2-90MI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD834F2-90MI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD834F2-90MI?
For technical support, including PSD834F2-90MI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD834F2-90MI requirements.
6.How does Aetrix verify that PSD834F2-90MI is sourced from the original manufacturer or authorized distributors?
All PSD834F2-90MI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD834F2-90MI meets industry standards.
7.What is the process for return or replacement of PSD834F2-90MI?
All PSD834F2-90MI units undergo pre-shipment inspection (PSI). If there is an issue with PSD834F2-90MI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD834F2-90MI part is unused and in its original packaging.
Return procedure for PSD834F2-90MI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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