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STMicroelectronics PSD835G2V-90U
- Part No.:
- PSD835G2V-90U
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 80-LQFP
- Datasheet:
-
PSD835G2V-90U.pdf
- Description:
- IC PROG PERIPH IC 80LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,629
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Product details
Overview
PSD835G2V-90U from STMicroelectronics is a Flash Programmable System Device (PSD) integrating 4 Mbit + 256 Kbit dual-bank Flash memory, 64 Kbit SRAM, 52 reconfigurable I/O ports, and a CPLD/DPLD logic block (≥3000 gates) for 8-bit microcontroller systems. It supports concurrent read-erase-write operations, in-system programming via JTAG, and page register–based address expansion. Used in legacy 80C51/80C251-based industrial controllers requiring embedded nonvolatile memory and glue logic consolidation.
For engineers reviewing the PSD835G2V-90U datasheet, PSD835G2V-90U pinout, PSD835G2V-90U application, or PSD835G2V-90U equivalent, key selection criteria include dual-bank Flash concurrency timing (90 ns access), PLD macrocell count (16 OMCs + 24 IMCs), JTAG ISP capability, 3 V ±10% supply operation, and LQFP80 package compatibility with 8-bit MCU bus interfaces.
Technical Context
The PSD835G2V-90U implements a tightly coupled architecture where Flash memory banks, SRAM, and PLD logic share a unified 8-bit MCU bus interface with configurable chip select decoding. Its dual-bank Flash enables simultaneous READ from one bank while erasing/writing the other-critical for in-application firmware updates without halting execution.
Internal PLD resources include a 16-output-macrocell CPLD and user-definable DPLD for address decoding, peripheral enable generation, and I/O function routing. The integrated page register extends the 8-bit MCU's 64 KB address space by 256×, enabling access to full 16 MB memory map using standard external bus cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Flash Memory | 4 Mbit primary + 256 Kbit secondary Flash, enabling concurrent read/erase/write for firmware update without system stall |
| SRAM | 64 Kbit on-chip SRAM, eliminating need for external RAM in compact 8-bit MCU designs |
| Access Time | 90 ns at VCC = 3.0–3.6 V, meeting timing requirements of 80C51/80C251 derivatives running ≤11 MHz |
| PLD Capacity | ≥3000 equivalent gates; 16 output macrocells (OMCs) + 24 input macrocells (IMCs) for custom logic and chip select decoding |
| I/O Ports | 52 individually configurable pins supporting MCU I/O, PLD I/O, latched address output, and open-drain modes |
| Programming Interface | JTAG-compliant ISP port enabling full-chip in-system programming with low-cost FlashLINK cable |
| Power Supply | 3.0 V ±10%, with standby current as low as 25 µA-suitable for battery-backed industrial control nodes |
Pinout & Package
LQFP80 (U) package per ECOPACK® specification, 12 × 12 mm body, 0.5 mm pitch, thermally enhanced for industrial ambient operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power supply input | 3.0 V ±10% main supply for all internal blocks (Flash, SRAM, PLD, I/O) |
| GND | Ground reference | Dedicated analog/digital ground plane connection required for stable 90 ns timing |
| A0–A15 | Address inputs | 16-bit address bus interface compatible with 80C51/80C251 multiplexed/non-multiplexed modes |
| D0–D7 | Data bus I/O | 8-bit bidirectional data path shared across Flash, SRAM, and PLD register access |
| RD, WR, CSx | Control signals | Standard 8-bit MCU read/write/chip select inputs mapped to internal memory block selection logic |
| TCK, TMS, TDI, TDO | JTAG ISP interface | IEEE 1149.1-compliant boundary-scan port enabling full-chip programming and debug without socketing |
| PE4 (Ready/Busy) | Flash status indicator | Active-low signal indicating Flash erase/write completion or busy state for synchronous polling |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank Flash concurrency | Enables real-time firmware update: READ from active bank while reprogramming inactive bank-no CPU stall required |
| Page register addressing | Expands 8-bit MCU 64 KB address space to 16 MB via 8-bit page register, eliminating external address latches |
| Reconfigurable I/O ports | All 52 pins support dynamic mode switching (MCU I/O, PLD I/O, latched address, open-drain) under software control |
| Integrated PLD logic | CPLD (16 OMCs) + DPLD (user-defined decode) replaces discrete PAL/GAL and address decoders in 8-bit systems |
| JTAG ISP with FlashLINK | Eliminates expensive programming sockets; allows field firmware updates using low-cost PC-connected cable |
Applications
| Industrial PLC I/O Module | Legacy Medical Device Controller |
|---|---|
Use Scenario: Compact programmable logic controller module with isolated digital I/O, firmware-upgradable via RS-232. IC Role / Device Role / Timing Role: PSD835G2V-90U serves as memory hub and glue logic replacement-hosting firmware in primary Flash, configuration data in secondary Flash, and implementing I/O enable decoding in CPLD. Use Value: Reduces BOM count by 7+ discrete ICs (SRAM, EPROM, PAL); enables field firmware patching without hardware change. |
Use Scenario: Battery-powered patient monitor with 80C51 core, requiring low-power sleep mode and secure boot code storage. IC Role / Device Role / Timing Role: Acts as unified memory + logic unit-storing boot loader in protected Flash sector and managing wake-up interrupt routing via PLD. Use Value: Achieves 25 µA standby current; eliminates external watchdog and address decoder, shrinking PCB area by 35%. |
| Automotive Body Control Unit | Point-of-Sale Terminal MCU Subsystem |
Use Scenario: Low-cost BCM managing door locks, lighting, and window controls using 80C251 derivative. IC Role / Device Role / Timing Role: Provides 64 Kbit SRAM for runtime variables, dual Flash for application + calibration data, and PLD for CAN transceiver enable sequencing. Use Value: Supports concurrent calibration update (secondary Flash) while executing control loop (primary Flash), ensuring zero downtime. |
Use Scenario: Embedded terminal with 80C51XA MCU handling keypad scan, display refresh, and serial printer interface. IC Role / Device Role / Timing Role: Consolidates memory (4 Mbit program + 64 Kbit SRAM) and peripheral address decoding (DPLD) into single LQFP80 device. Use Value: Eliminates 3 external chips; simplifies layout for CE/UL-certified enclosure with fixed 90 ns timing margin. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash-based programmable system device applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD813F2V-90U | Smaller memory: 2 Mbit + 128 Kbit Flash, 32 Kbit SRAM; same PLD architecture and LQFP80 package | Suitable for cost-sensitive designs with reduced firmware footprint and fewer peripherals | Select when total memory requirement is ≤2.128 Mbit and PLD logic demand remains identical |
| PSD834G2V-90U | Same 4 Mbit + 256 Kbit Flash and 64 Kbit SRAM, but lacks DPLD decoding capability and has only 12 OMCs | Applicable where address decoding is handled externally or simplified peripheral mapping suffices | Choose if CPLD logic budget is constrained to ≤12 outputs and no user-defined chip select decoding is needed |
Compared with PSD813F2V-90U, the PSD835G2V-90U provides double Flash/SRAM capacity and full DPLD configurability; versus PSD834G2V-90U, it adds 4 additional OMCs and full DPLD decode-making it optimal for complex 8-bit systems requiring maximum memory and logic integration.
Availability
PSD835G2V-90U is available at Aetrix Electronics and suitable for industrial PLC modules, legacy medical device controllers, and automotive body control units requiring stable component supply through extended product lifecycles.
Supply support for PSD835G2V-90U includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in microcontrollers, power management, and embedded flash solutions for industrial, automotive, and consumer markets.
The PSD (Programmable System Device) product line was designed to replace discrete memory and logic components in 8-bit MCU systems-integrating Flash, SRAM, and PLD in a single package to reduce board space and design complexity.
FAQ
Is PSD835G2V-90U still in production?
No-PSD835G2V-90U is marked as Obsolete by STMicroelectronics (per Doc ID 10585 Rev 3). However, Aetrix Electronics maintains legacy inventory with full traceability and offers lifecycle management support including last-time-buy planning and cross-reference guidance for functional replacements.
What development tools are required for programming?
PSDsoft™ software (v3.5 or later) is mandatory for configuring PLD logic, memory mapping, and generating JTAG programming files. Programming requires ST's FlashLINK JTAG cable connected to a Windows PC-no third-party programmers are supported due to proprietary ISP command set.
Can the dual-bank Flash operate independently of the MCU clock?
Yes-the Flash memory subsystem uses an internal oscillator independent of the host MCU clock. Erase and program operations proceed autonomously once initiated via JTAG or in-application commands, allowing the 8-bit MCU to execute code from the opposite bank during background Flash activity.
Does the PLD support in-system reconfiguration?
No-the CPLD and DPLD logic configuration is stored in dedicated Flash sectors and loaded at power-up or reset. Reconfiguration requires full-chip JTAG programming; runtime PLD logic changes are not supported. Logic updates must be performed offline using PSDsoft™ and FlashLINK.
PSD835G2V-90U Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 80-LQFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 80-LQFP (12x12)
- Grade:
- -
- Qualification:
- -
PSD835G2V-90U FAQ
1.How can I place an order for PSD835G2V-90U through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD835G2V-90U on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD835G2V-90U reliable?
The price and inventory of PSD835G2V-90U are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD835G2V-90U is usually 5 days.
3.What payment methods are accepted for PSD835G2V-90U?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD835G2V-90U transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD835G2V-90U?
PSD835G2V-90U orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD835G2V-90U order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD835G2V-90U?
For technical support, including PSD835G2V-90U datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD835G2V-90U requirements.
6.How does Aetrix verify that PSD835G2V-90U is sourced from the original manufacturer or authorized distributors?
All PSD835G2V-90U products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD835G2V-90U meets industry standards.
7.What is the process for return or replacement of PSD835G2V-90U?
All PSD835G2V-90U units undergo pre-shipment inspection (PSI). If there is an issue with PSD835G2V-90U, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD835G2V-90U part is unused and in its original packaging.
Return procedure for PSD835G2V-90U:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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