Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

STMicroelectronics PSD853F2-90MI

Part No.:
PSD853F2-90MI
Manufacturer:
STMicroelectronics
Category:
Specialized ICs
Package:
52-QFP
Datasheet:
AetrixPSD853F2-90MI.pdf
Description:
IC PROG PERIPH IC 52PQFP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,212

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

PSD853F2-90MI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (1.5 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, and a hybrid PLD (3000-gate CPLD + user-defined DPLD). It supports concurrent read/erase/write operations and is used in legacy industrial control systems requiring field-upgradable firmware and flexible address decoding.

For engineers reviewing the PSD853F2-90MI datasheet, PSD853F2-90MI pinout, PSD853F2-90MI application, or PSD853F2-90MI equivalent, key selection criteria include ISP JTAG support, dual-bank Flash concurrency, page register–enabled 256× address expansion, and PLD-based chip select decoding for 8-bit MCUs like 80C51XA and 68HC11.

Technical Context

This device functions as a memory and logic co-processor adjacent to an 8-bit MCU bus, providing nonvolatile storage, volatile RAM, and configurable logic in a single PQFP52 package. Its architecture separates primary and secondary Flash banks to enable background erase while executing code from the other bank.

The integrated PLD includes both CPLD (16 OMCs, 24 IMCs) and DPLD blocks for custom chip-select generation and glue logic replacement. The page register extends the MCU's 16-bit address space to 24 bits, enabling access to up to 16 MB of combined memory space without external latches.

Key Specifications

Parameter Value and Actual Design Meaning
Primary Flash 1.5 Mbit (8 × 32K x8 uniform sectors); enables firmware partitioning and A/B update schemes.
Secondary Flash 256 Kbit (4 × 64K x8 uniform sectors); dedicated for configuration data or boot loader storage.
SRAM 256 Kbit (32K x8); provides fast, battery-backed or volatile working memory for MCU data buffers.
PLD Capacity 3000 equivalent gates; implements combinational and registered logic for address decoding and I/O control.
Max Clock Speed 90 MHz system timing (90 ns access time); supports high-speed 8-bit bus interfaces including 80C51XA and 68HC11.
I/O Ports 27 reconfigurable pins; 16 support open-drain mode for wired-OR bus signaling or level translation.
JTAG Interface Fully compliant IEEE 1149.1 port; enables in-system programming, boundary scan, and debug access without MCU involvement.

Pinout & Package

PQFP52 (Plastic Quad Flat Package, 52-pin, 10 × 10 mm, 0.65 mm pitch), ECOPACK® RoHS-compliant package with exposed thermal pad.

Pin/Terminal Circuit Role Design Meaning
A0–A15 Address Inputs 16-bit multiplexed or non-multiplexed address bus interface; supports both 80C51XA and 68HC11 addressing modes.
D0–D7 Data Bus 8-bit bidirectional data path; compatible with standard 8-bit MCU data buses and supports byte-enable control.
RD, WR, CS Control Signals Standard read/write/chip-select inputs; mapped to MCU control lines for seamless integration without glue logic.
TCK, TMS, TDI, TDO JTAG Port IEEE 1149.1 serial test interface; enables full-chip ISP, flash programming, and boundary-scan diagnostics.
RESET Reset Input Active-low synchronous reset signal; initializes Flash, SRAM, PLD registers, and internal state machines.
VCC, VSS Power Supply 5 V ±10% supply and ground; supports industrial temperature range operation (–40°C to +85°C).

Key Features

Feature Design Value
Dual-bank Flash concurrency Enables real-time firmware updates: read active code from Bank A while erasing/writing Bank B-no system halt required.
Page register (256-page expansion) Extends 16-bit MCU address space to 24 bits (64 KB → 16 MB), eliminating need for external address latches or banking logic.
Configurable PLD logic Replaces discrete decoders, latches, and glue logic; DPLD handles chip-select decoding, CPLD implements custom I/O control or state machines.
Open-drain I/O capability 16 pins support open-drain mode for shared bus arbitration, interrupt line wiring, or level-shifting in mixed-voltage systems.
Programmable power management Automatic Power-down (APD) unit reduces standby current to <100 µA; configurable via PMMR registers for low-power embedded operation.

Applications

Industrial PLC Controller Legacy Medical Instrument

Use Scenario: Field-deployed programmable logic controller with firmware update capability and hardware-configurable I/O mapping.

IC Role / Device Role / Timing Role: Memory and logic co-processor managing Flash-based program storage, SRAM data buffering, and dynamic chip-select generation for modular I/O expansion.

Use Value: Concurrent Flash bank operation allows zero-downtime firmware upgrades; PLD eliminates external decoder ICs, reducing BOM count and board area.

Use Scenario: Electromechanical diagnostic equipment using 80C51XA MCU with strict EMI and reliability requirements.

IC Role / Device Role / Timing Role: Nonvolatile peripheral providing secure boot code storage, runtime parameter retention, and noise-immune address decoding via CPLD.

Use Value: JTAG ISP enables post-manufacturing calibration data programming; open-drain I/O supports isolated interrupt signaling in safety-critical subsystems.

Automotive Body Control Module Point-of-Sale Terminal

Use Scenario: In-vehicle body electronics module requiring EEPROM-like field reprogramming and robust power management.

IC Role / Device Role / Timing Role: Flash/SRAM/PLD system-on-package interfacing with 68HC11 MCU; handles wake-up logic, sensor data logging, and CAN interface glue logic.

Use Value: APD power-down mode cuts quiescent current below 100 µA during sleep cycles; sector protection prevents accidental overwrites of critical calibration data.

Use Scenario: Embedded payment terminal with legacy 8-bit architecture needing secure firmware updates and peripheral expansion.

IC Role / Device Role / Timing Role: Memory expansion and logic interface between 80C251 MCU and display, keypad, and smart-card reader peripherals.

Use Value: Dual-bank Flash supports signed firmware validation before activation; page register simplifies memory-mapped peripheral addressing across multiple add-on modules.

Equivalent & Alternatives

The following parts are listed as comparable options for similar Flash+PLD+SRAM peripheral applications.

Alternative Part Technical Difference Application Difference Selection Advice
PSD854F2-90MI 2 Mbit primary Flash (vs. 1.5 Mbit), same SRAM/PLD specs; identical pinout and timing. Supports larger firmware images; requires no PCB change but increases cost and programming time. Select when firmware size exceeds 1.5 Mbit and backward compatibility with PSD853F2 layout is required.
PSD833F2-90MI 1 Mbit primary Flash, no secondary Flash; otherwise identical architecture and pinout. Lacks secondary Flash for boot loader isolation; suitable only for simpler, single-image applications. Choose for cost-sensitive designs where concurrent update capability and dual-bank security are not required.

Compared with PSD854F2-90MI, the PSD853F2-90MI trades 512 Kbit Flash capacity for lower cost and faster programming cycles; versus PSD833F2-90MI, it adds 500 Kbit primary Flash and full secondary Flash functionality-enabling secure A/B firmware deployment in safety-critical systems.

Availability

PSD853F2-90MI is available at Aetrix Electronics and suitable for industrial PLC controllers, legacy medical instruments, automotive body control modules, and point-of-sale terminals requiring stable component supply and long-term obsolescence mitigation.

Supply support for PSD853F2-90MI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management devices, and memory solutions for industrial, automotive, and consumer markets.

The PSD8XXFX product line was engineered specifically to replace discrete memory, logic, and interface components in 8-bit MCU systems-delivering Flash+SRAM+PLD integration with JTAG-based field programmability and industrial-grade reliability.

FAQ

Is PSD853F2-90MI still in production?

No-PSD853F2-90MI is marked as Obsolete by STMicroelectronics per Doc ID 7833 Rev 7. However, Aetrix Electronics maintains verified legacy stock with full traceability, extended warranty, and engineering support for ongoing production and repair programs.

What development tools support JTAG programming of PSD853F2-90MI?

ST's FlashLINK cable and PSDSoft development software (v3.5 or earlier) are fully compatible. The JTAG interface complies with IEEE 1149.1, so third-party boundary-scan tools with configurable instruction sets can also perform ISP if configured for PSD-specific IDCODE (0x2080103F) and command sequences.

Can the PLD logic be reconfigured independently of Flash contents?

Yes-the CPLD and DPLD blocks are programmed separately from Flash memory using distinct JTAG instructions. PLD configuration persists through Flash erase cycles and can be updated in-system without affecting stored firmware or SRAM data.

Does PSD853F2-90MI support 3.3 V operation?

No-it is a 5 V-only device (VCC = 4.5–5.5 V), specified in Table 40 of the datasheet. It lacks 3 V logic-level compatibility; interfacing with 3.3 V MCUs requires level-shifting on all bus signals, including JTAG lines.

PSD853F2-90MI Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Series:
-
Package/Case:
52-QFP
Packaging:
Tray
Product Status:
Obsolete
Programmable:
Not Verified
Type:
Programmable Peripherals IC
Applications:
8-Bit MCU Peripherals
Mounting Type:
Surface Mount
Supplier Device Package:
52-PQFP (10x10)
Grade:
-
Qualification:
-

PSD853F2-90MI FAQ

1.How can I place an order for PSD853F2-90MI through Aetrix?

Please submit a Request for Quotation (RFQ) for PSD853F2-90MI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PSD853F2-90MI reliable?

The price and inventory of PSD853F2-90MI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD853F2-90MI is usually 5 days.

3.What payment methods are accepted for PSD853F2-90MI?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD853F2-90MI transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PSD853F2-90MI?

PSD853F2-90MI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PSD853F2-90MI order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PSD853F2-90MI?

For technical support, including PSD853F2-90MI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD853F2-90MI requirements.

6.How does Aetrix verify that PSD853F2-90MI is sourced from the original manufacturer or authorized distributors?

All PSD853F2-90MI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD853F2-90MI meets industry standards.

7.What is the process for return or replacement of PSD853F2-90MI?

All PSD853F2-90MI units undergo pre-shipment inspection (PSI). If there is an issue with PSD853F2-90MI, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PSD853F2-90MI part is unused and in its original packaging.

Return procedure for PSD853F2-90MI:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

PSD853F2-90MI Tags

  • PSD853F2-90MI
  • PSD853F2-90MI PDF
  • PSD853F2-90MI Datasheet
  • PSD853F2-90MI Specifications
  • PSD853F2-90MI Images
  • STMicroelectronics
  • STMicroelectronics PSD853F2-90MI
  • Buy PSD853F2-90MI
  • PSD853F2-90MI Price
  • PSD853F2-90MI Distributor
  • PSD853F2-90MI Supplier
  • PSD853F2-90MI Wholesale
Related Products
CAP200DG-TL
CAP200DG-TL

Power Integrations

ATSHA204A-MAHDA-T
ATSHA204A-MAHDA-T

Microchip Technology

ATSHA204A-SSHDA-T
ATSHA204A-SSHDA-T

Microchip Technology

ATSHA204A-STUCZ-T
ATSHA204A-STUCZ-T

Microchip Technology

ATECC608B-MAHDA-T
ATECC608B-MAHDA-T

Microchip Technology

ATECC608B-MAHCZ-S
ATECC608B-MAHCZ-S

Microchip Technology

ATECC608B-SSHDA-T
ATECC608B-SSHDA-T

Microchip Technology

ATECC608B-MAHDA-S
ATECC608B-MAHDA-S

Microchip Technology

ATECC608A-MAHDA-S
ATECC608A-MAHDA-S

Microchip Technology

ATECC608B-MAVDA-T
ATECC608B-MAVDA-T

Microchip Technology

ATECC608A-SSHDA-T
ATECC608A-SSHDA-T

Microchip Technology

ATECC508A-MAHDA-T
ATECC508A-MAHDA-T

Microchip Technology

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER