STMicroelectronics PSD854F2-90MI
- Part No.:
- PSD854F2-90MI
- Manufacturer:
- STMicroelectronics
- Category:
- Specialized ICs
- Package:
- 52-QFP
- Datasheet:
-
PSD854F2-90MI.pdf
- Description:
- IC PROG PERIPH IC 52PQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,956
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Product details
Overview
PSD854F2-90MI from STMicroelectronics is a Flash in-system programmable (ISP) peripheral IC for 8-bit microcontrollers, integrating dual-bank Flash (2 Mbit primary + 256 Kbit secondary), 256 Kbit SRAM, 27 reconfigurable I/O ports, and a 3000-gate PLD with CPLD/DPLD architecture. It supports concurrent read/erase/write operations and operates at 5 V with 90 ns access time, deployed in embedded industrial control systems requiring flexible memory expansion and logic customization.
For engineers reviewing the PSD854F2-90MI datasheet, PSD854F2-90MI pinout, PSD854F2-90MI application, or PSD854F2-90MI equivalent, key selection criteria include ISP JTAG support, dual-bank Flash concurrency, PLD macrocell count (16 OMCs/24 IMCs), page register address expansion capability, and compatibility with 80C51XA, 68HC11, and 80C251 MCU buses.
Technical Context
The PSD854F2-90MI implements a tightly coupled memory-peripheral architecture where the primary Flash (32K × 8, 8 uniform sectors) and secondary Flash (64K × 4, 4 uniform sectors) operate independently under JTAG-controlled ISP. Its PLD subsystem comprises two distinct blocks: a Decode PLD (DPLD) for user-defined chip select decoding and a Complex PLD (CPLD) with 16 output macrocells supporting synchronous/asynchronous logic.
Memory mapping is managed via an internal 8-bit page register enabling 256× address space expansion, while the MCU bus interface supports both multiplexed (e.g., 80C51XA) and non-multiplexed (e.g., 68HC11) 8-bit data/address buses. Power management includes Automatic Power-down (APD) and Turbo Bit mode for dynamic current optimization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Primary Flash Memory | 2 Mbit (32K × 8), organized in 8 uniform sectors - enables firmware partitioning and field-upgradable code banks |
| Secondary Flash Memory | 256 Kbit (64K × 4), 4 uniform sectors - provides dedicated space for configuration data or boot loader storage |
| SRAM Capacity | 256 Kbit - supports full data buffering and stack allocation for 8-bit MCUs without external RAM |
| PLD Logic Density | 3000 gates - delivers sufficient combinatorial and registered logic to replace discrete glue logic and address decoders |
| Access Time | 90 ns - ensures timing compliance with 8 MHz–12 MHz 8-bit MCU buses including 80C31 and 68HC11 |
| I/O Ports | 27 reconfigurable pins - configurable as MCU I/O, PLD I/O, latched address outputs, or open-drain (16 pins) |
| JTAG Interface | IEEE 1149.1-compliant serial port - enables full-chip in-system programming and boundary-scan testing without socket removal |
Pinout & Package
PQFP52 (M) package per ECOPACK® standard, 52-pin plastic quad flat pack with 0.65 mm pitch, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Power Supply | +5 V main supply for core and I/O operation |
| GND | Ground Reference | Digital ground plane reference for all internal circuits |
| A0–A15 | Address Inputs | 16-bit address bus interface compatible with 80C51XA and 68HC11 addressing modes |
| D0–D7 | Data Bus | 8-bit bidirectional data path supporting multiplexed/non-multiplexed MCU interfaces |
| RD, WR, CS | Control Signals | Standard read/write/chip select inputs synchronized to MCU bus timing |
| TCK, TMS, TDI, TDO | JTAG Test Access Port | IEEE 1149.1 signals enabling in-system programming and debug visibility |
| RESET | Asynchronous Reset Input | Active-low signal initializing Flash, SRAM, PLD registers, and page register to power-on state |
Key Features
| Feature | Design Value |
|---|---|
| Dual-bank concurrent Flash operation | Read from one bank while erasing/writing the other - eliminates system halt during firmware updates |
| Page register address expansion | 8-bit internal register extends MCU address space by factor of 256 - enables >64 KB memory mapping on 16-bit address buses |
| Configurable I/O architecture | 27 pins support MCU I/O, PLD I/O, latched address output, or special function roles - reduces external logic count |
| PLD with macrocell flexibility | 16 OMCs + 24 IMCs in CPLD block plus DPLD decoding - replaces discrete PAL/GAL and address decoders |
| Programmable power management | APD unit and Turbo Bit mode - cuts standby current to <100 µA and dynamically scales performance vs. power |
Applications
| Industrial PLC I/O Expansion | Legacy MCU System Modernization |
|---|---|
Use Scenario: Adding non-volatile program storage and logic decoding to 80C51-based programmable logic controllers. IC Role / Device Role / Timing Role: Acts as unified memory+logic peripheral, replacing separate EPROM, SRAM, and PAL chips on the bus. Use Value: Reduces BOM count by 3–4 components and enables field firmware updates via JTAG without hardware modification. |
Use Scenario: Upgrading aging 68HC11-based medical instrument control boards with integrated Flash and configurable logic. IC Role / Device Role / Timing Role: Provides 2 Mbit primary Flash for updated firmware and DPLD for custom chip select decoding across multiple peripherals. Use Value: Eliminates need for external address decoders and supports secure, in-circuit reprogramming during service calibration. |
| Automotive Body Control Module | Test Equipment Firmware Loader |
Use Scenario: Implementing configurable logic and dual-bank Flash in 80C251-based body control units for regional variant support. IC Role / Device Role / Timing Role: Stores region-specific calibration tables in secondary Flash and executes safety-critical routines from protected primary Flash sectors. Use Value: Enables over-the-air update of calibration data without interrupting main firmware execution via concurrent Flash operation. |
Use Scenario: Serving as a universal Flash programming adapter for production test fixtures targeting multiple 8-bit MCU platforms. IC Role / Device Role / Timing Role: Functions as JTAG-controlled Flash programmer with built-in SRAM buffer and page register for multi-image loading. Use Value: Supports automated programming of diverse 8-bit targets using single hardware fixture and standardized JTAG cable. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash+PLD peripheral applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PSD853F2-90MI | Same PQFP52 package and architecture but 1 Mbit primary Flash (vs. 2 Mbit) and no secondary Flash | Suitable only for simpler designs lacking need for concurrent firmware update or dual-bank protection | Select when firmware size ≤1 Mbit and no requirement for background sector erase during runtime |
| PSD834F2-90MI | Identical 2 Mbit/256 Kbit Flash split but uses PLCC52 package and lacks Turbo Bit power mode | Preferred for through-hole prototyping or legacy board redesigns requiring socket compatibility | Choose when mechanical fit requires PLCC52 or when APD power-down is not required in final design |
Compared with PSD854F2-90MI, PSD853F2-90MI trades Flash capacity for cost reduction, while PSD834F2-90MI sacrifices surface-mount packaging and advanced power management for legacy assembly compatibility - neither offers the full feature set for new designs requiring concurrent Flash operation and fine-grained power control.
Availability
PSD854F2-90MI is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and legacy MCU system modernization requiring stable component supply and long-term lifecycle support.
Supply support for PSD854F2-90MI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and consumer markets.
The PSD8XXFX product line was developed specifically to integrate Flash memory, SRAM, and programmable logic into a single peripheral for 8-bit microcontroller systems - reducing board space, simplifying design, and enabling in-field firmware upgrades.
FAQ
Is PSD854F2-90MI still in active production?
No - PSD854F2-90MI is marked as Obsolete Product(s) per STMicroelectronics' official documentation (Doc ID 7833 Rev 7). However, Aetrix Electronics maintains a verified legacy inventory with full traceability, extended warranty, and technical support for ongoing production and repair programs.
What MCU families does PSD854F2-90MI directly support?
PSD854F2-90MI natively interfaces with 80C31, 80C251, 80C51XA, and 68HC11 MCUs via configurable bus timing and control signal mapping. Its MCU bus interface supports both multiplexed (address/data shared) and non-multiplexed (separate) architectures as defined in sections 15.1–15.8 of the datasheet.
Can the PLD portion be reprogrammed independently of Flash memory?
Yes - the CPLD and DPLD blocks are programmed separately using JTAG commands defined in Table 6 of the datasheet. PLD configuration is stored in dedicated non-volatile cells and can be updated without altering Flash contents or SRAM data, enabling logic changes without firmware reload.
Does PSD854F2-90MI support sector-level write protection?
Yes - Flash Sector Protection is implemented via the Flash Protection register (Section 10.1), allowing individual 32 KB sectors in primary Flash and 64 KB blocks in secondary Flash to be locked against accidental erase or program. Protection status is readable via dedicated instruction (Section 7.5).
PSD854F2-90MI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 52-QFP
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Programmable Peripherals IC
- Applications:
- 8-Bit MCU Peripherals
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 52-PQFP (10x10)
- Grade:
- -
- Qualification:
- -
PSD854F2-90MI FAQ
1.How can I place an order for PSD854F2-90MI through Aetrix?
Please submit a Request for Quotation (RFQ) for PSD854F2-90MI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PSD854F2-90MI reliable?
The price and inventory of PSD854F2-90MI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PSD854F2-90MI is usually 5 days.
3.What payment methods are accepted for PSD854F2-90MI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PSD854F2-90MI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PSD854F2-90MI?
PSD854F2-90MI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PSD854F2-90MI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PSD854F2-90MI?
For technical support, including PSD854F2-90MI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PSD854F2-90MI requirements.
6.How does Aetrix verify that PSD854F2-90MI is sourced from the original manufacturer or authorized distributors?
All PSD854F2-90MI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PSD854F2-90MI meets industry standards.
7.What is the process for return or replacement of PSD854F2-90MI?
All PSD854F2-90MI units undergo pre-shipment inspection (PSI). If there is an issue with PSD854F2-90MI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PSD854F2-90MI part is unused and in its original packaging.
Return procedure for PSD854F2-90MI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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