Diodes Incorporated PT7M7433TAEX

Overview

PT7M7433TAEX from Pericom Semiconductor is a user-adjustable single-level microprocessor supervisory circuit with dual threshold monitoring (HTHIN/LTHIN), 615 mV internal reference, 90 ms minimum LBO timeout, and push-pull low-battery output. It operates from 1.8 V to 5.5 V, draws only 1.5 µA typical supply current, and functions across –40°C to +85°C for battery state-of-charge indication in portable power systems.

For engineers reviewing the PT7M7433TAEX datasheet, PT7M7433TAEX pinout, PT7M7433TAEX application, or PT7M7433TAEX equivalent, this device supports precise, noise-immune battery monitoring via external resistor-divider programming of high/low trip points - critical for Li+, alkaline, NiCd, and NiMH power supply management in space-constrained embedded designs.

Technical Context

The PT7M7433TAEX integrates two high-impedance comparators referenced to a stable 615 mV internal bandgap, enabling independent high-threshold (HTHIN) and low-threshold (LTHIN) detection. Its logic-controlled timing block enforces a minimum 90 ms LBO assertion period after voltage drop and requires ≥90 ms stabilization above VHTHIN before deassertion.

Hysteresis is fully user-defined via external R1–R3 resistor network, allowing programmable trip points down to 0.62 V and eliminating output chattering during battery recovery transients. The push-pull LBO output drives directly to VCC and supports 200 µA sourcing at 0.8×VCC.

Key Specifications

Pinout & Package

PT7M7433TAEX is housed in a lead-free, green SOT-23-5 package (JEDEC MO-178C/AA compliant), with 1.05–1.25 mm body height, 2.82–3.02 mm length, and 1.50–1.70 mm width.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar battery monitoring applications.

Compared with MAX6375KA+T and TPS3808G12DBVR, PT7M7433TAEX uniquely delivers push-pull LBO, user-programmable dual thresholds with hysteresis, and sub-2 µA operation in the same SOT23-5 footprint - enabling compact, responsive, and chemistry-agnostic battery supervision without external passives.

Availability

PT7M7433TAEX is available at Aetrix Electronics and suitable for portable medical devices, wireless sensor nodes, handheld industrial scanners, and smart home remotes requiring stable component supply and long-term battery runtime assurance.

Supply support for PT7M7433TAEX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Pericom Semiconductor (now part of Diodes Incorporated) specialized in high-performance interface, timing, and power management ICs for communications, computing, and consumer electronics.

The PT7M7433 series belongs to Pericom's µP supervisory product line, designed specifically for accurate, low-power battery state-of-charge monitoring in portable and battery-critical embedded systems.

FAQ

What is the function of the HTHIN and LTHIN pins?

HTHIN and LTHIN are high-impedance analog inputs that connect to an external resistor divider across the monitored battery. HTHIN sets the upper voltage threshold at which the LBO output deasserts after recovery; LTHIN sets the lower threshold at which LBO asserts. Both compare against the internal 615 mV reference to determine battery state transitions.

Can PT7M7433TAEX monitor a single 1.5 V alkaline cell?

Yes - with appropriate resistor divider scaling, PT7M7433TAEX can monitor down to 0.62 V input at LTHIN/HTHIN. For a 1.5 V alkaline cell, a divider ratio of ~2.4:1 (e.g., R1=1.2 MΩ, R2=470 kΩ, R3=330 kΩ) sets VLTHIN ≈ 0.9 V (low warning) and VHTHIN ≈ 1.1 V (recovery), supporting full discharge profiling.

Why does PT7M7433TAEX use a push-pull LBO instead of open-drain?

The push-pull output eliminates the need for an external pull-up resistor, reducing BOM count and PCB area. It actively drives high to VCC (not just floats), ensuring deterministic logic levels for direct MCU GPIO interfacing - especially valuable in low-voltage (1.8 V–2.5 V) systems where weak pull-ups may fail to meet VIH requirements.

How is hysteresis implemented and why is it adjustable?

Hysteresis is implemented by configuring separate trip points for LBO assertion (LTHIN) and deassertion (HTHIN) using distinct resistor-divider nodes. Adjustability allows designers to tailor noise margin to specific battery chemistry and load profile - wider hysteresis prevents chattering during NiMH voltage rebound, while narrower hysteresis improves resolution for Li+ flat-discharge curves.