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NXP Semiconductors PTN3365BSMP
- Part No.:
- PTN3365BSMP
- Manufacturer:
- NXP Semiconductors
- Category:
- Video Processing
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
PTN3365BSMP.pdf
- Description:
- PTN3365BS - Enhanced Performance
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
PTN3365BSMP from NXP Semiconductors is a high-speed HDMI/DVI level shifter IC that converts four lanes of low-swing AC-coupled differential inputs (DisplayPort/PCIe-compliant) to DVI v1.0 and HDMI v1.4b-compliant TMDS outputs at up to 3.0 Gbit/s per lane, supporting 4K × 2K, 3D, and 36-bit deep color video. It integrates active DDC buffering with 3.3 V ↔ 5 V level shifting, HPD voltage translation, and programmable equalization - deployed in PC graphics cards, docking stations, and DisplayPort-to-HDMI adapters.
For engineers reviewing the PTN3365BSMP datasheet, PTN3365BSMP pinout, PTN3365BSMP application, or PTN3365BSMP equivalent, this page delivers verified electrical specifications, HVQFN32 package layout, real-world use cases for multi-standard display interfaces, and validated alternative parts for HDMI/DVI signal integrity design.
Technical Context
The PTN3365BSMP implements transparent, non-re-timing level translation across three independent signal domains: four TMDS data lanes (IN_Dx/OUT_Dx), a bidirectional DDC channel (SCL/SDA with rise-time acceleration), and unidirectional HPD translation (HPD_SINK → HPD_SOURCE). Each TMDS lane includes self-biasing 50 Ω termination, back-current-safe open-drain outputs, and a programmable 5-level equalizer via EQ5.
Its DDC buffer provides capacitive isolation (up to 1400 pF sink-side load), 0 Hz–400 kHz I²C operation, and overvoltage-tolerant 3.3 V/5 V I/Os with disable control (DDC_EN). The device operates from a single 3.3 V supply (3.0–3.6 V), consumes 70 mA typical in active mode, and enters sub-5 mA standby when OE_N is high.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Lane count | 4 independent TMDS lanes for full HDMI/DVI main link support |
| Max data rate | 3.0 Gbit/s per lane - enables 4K × 2K @ 60 Hz, 3D, and 36-bit color |
| Input compliance | DisplayPort v1.2 & PCIe v1.1 low-swing AC-coupled differential signals |
| Output compliance | DVI v1.0 & HDMI v1.4b TMDS open-drain current-steering outputs |
| Supply voltage | 3.3 V ±10 % - single-rail operation simplifies power design |
| Power consumption | 70 mA typical active current; ≤5 mA standby with OE_N high |
| ESD rating | 6 kV HBM / 1 kV CDM - robust for board-level handling and system integration |
| Operating temp | −40 °C to +85 °C - qualified for industrial and consumer embedded applications |
Pinout & Package
PTN3365BSMP is housed in a 5 mm × 5 mm × 0.85 mm HVQFN32 package with exposed thermal pad requiring PCB soldering and thermal vias. All GND pins (pins 22 and exposed pad) must be connected to system ground for proper biasing, thermal dissipation, and signal integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN_D1+ to IN_D4− (pins 25–32) | Self-biasing differential inputs | Accept low-swing AC-coupled DisplayPort/PCIe signals; integrated 50 Ω termination enabled when OE_N = LOW |
| OUT_D1+ to OUT_D4− (pins 9–16) | HDMI/DVI-compliant TMDS outputs | Open-drain current-steering outputs terminated to 3.3 V; back-current-safe when unpowered |
| HPD_SINK (pin 21), HPD_SOURCE (pin 5) | Hot Plug Detect level shifter | Translates 0–5 V sink-side HPD to 0–3.3 V source-side; integrated 200 kΩ pull-down ensures LOW when no display is connected |
| SCL_SOURCE/SDA_SOURCE (pins 7,6), SCL_SINK/SDA_SINK (pins 19,20) | Active DDC I²C buffer | 3.3 V ↔ 5 V bidirectional level shifting with rise-time acceleration on sink side; supports up to 1400 pF bus capacitance |
| OE_N (pin 17), DDC_EN (pin 23) | Functional enable controls | OE_N disables TMDS lanes (high-Z inputs/outputs); DDC_EN isolates DDC channel - both reduce power without affecting HPD |
| REXT (pin 4), EQ5 (pin 2) | Analog configuration ports | REXT sets output current reference (10 kΩ to GND recommended); EQ5 selects one of five equalizer gains (0–9 dB) via board strapping |
Key Features
| Feature | Design Value |
|---|---|
| Transparent TMDS level shifting | No re-timing, no state machines, no reset required - preserves native signal timing and jitter profile |
| Programmable 5-level equalization | EQ5 pin supports 0 dB, 2 dB, 3.5 dB, 7 dB, or 9 dB boost to compensate for channel loss in long cables or FR4 traces |
| Back-current-safe sink interfaces | Prevents backdrive from powered HDMI/DVI sinks into unpowered PTN3365BSMP - protects source-side power rails |
| Active DDC buffer with rise-time acceleration | Extends I²C bus reach to 18 m or 1400 pF on sink side while maintaining HDMI DDC spec compliance |
| Integrated 50 Ω input termination | Eliminates external resistors on IN_Dx lines - reduces BOM count and improves impedance matching accuracy |
| Low-power standby modes | Sub-5 mA quiescent current with OE_N HIGH or DDC_EN LOW - ideal for energy-conscious display systems |
Applications
| PC Graphics Card Interface | Docking Station Signal Bridge |
|---|---|
Use Scenario: Converting DisplayPort output from GPU to HDMI/DVI on add-in card with shared I/O resources. IC Role / Device Role / Timing Role: Level shifter enabling multi-standard PHY reuse without retiming or protocol conversion. Use Value: Reduces GPU pin count and PCB layer count by eliminating separate HDMI/DVI PHYs while maintaining 3.0 Gbit/s per-lane bandwidth. |
Use Scenario: Supporting simultaneous HDMI and DVI outputs from a single DisplayPort source in enterprise docking hardware. IC Role / Device Role / Timing Role: Transparent physical-layer translator between source-side low-swing differential signaling and sink-side TMDS standards. Use Value: Enables plug-and-play compatibility with legacy DVI monitors and modern HDMI displays using one compact interface IC. |
| DisplayPort-to-HDMI Adapter | Long-Cable DVI Driver |
Use Scenario: Active cable adapter delivering 4K × 2K video from laptop DisplayPort to HDMI TV over >2 m cable run. IC Role / Device Role / Timing Role: High-speed level shifter with integrated equalization compensating for insertion loss in passive cables. Use Value: Maintains eye opening and jitter margin at 3.0 Gbit/s by applying up to 9 dB EQ gain - avoids signal degradation-induced pixel errors. |
Use Scenario: Driving DVI-D dual-link monitors over extended distances (>5 m) in digital signage installations. IC Role / Device Role / Timing Role: TMDS driver with back-current protection and robust 50 Ω input termination for stable long-run signal integrity. Use Value: Prevents sink-side power from backfeeding into unpowered source equipment - critical for field-deployed, maintenance-sensitive systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar HDMI/DVI level shifting applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TPD12S016 | Single-chip solution integrating HDMI level shifter + ESD protection + DDC buffer; no programmable EQ; max 2.25 Gbit/s per lane | Targeted at cost-sensitive consumer adapters; lacks 3.0 Gbit/s support for 4K/60 Hz | Choose for ESD-integrated designs where 4K/60 Hz is not required and board space is constrained |
| Pericom PI3HDX1204A | 4-lane HDMI level shifter with fixed 3.3 V operation; no DDC rise-time acceleration; no HPD pull-down resistor | Requires external components for DDC bus extension and HPD biasing - increases BOM and layout complexity | Choose when existing designs already implement discrete DDC buffering and HPD conditioning |
Compared with TPD12S016 and PI3HDX1204A, PTN3365BSMP uniquely combines 3.0 Gbit/s per-lane capability, programmable equalization, integrated HPD pull-down, and sink-side DDC rise-time acceleration - making it optimal for high-fidelity 4K/3D video bridging where signal integrity and integration density are critical.
Availability
PTN3365BSMP is available at Aetrix Electronics and suitable for PC motherboard graphics interfaces, docking station signal bridges, and DisplayPort-to-HDMI adapters requiring stable component supply, industrial temperature range (−40 °C to +85 °C), and long-term lifecycle assurance.
Supply support for PTN3365BSMP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on secure connectivity solutions for automotive, industrial, and consumer applications, with deep expertise in interface, analog, and mixed-signal ICs.
The PTN3365BSMP belongs to NXP's high-speed interface product line, designed specifically to simplify multi-standard display connectivity in resource-constrained systems while meeting HDMI, DVI, and DisplayPort electrical compliance requirements.
FAQ
What is the maximum data rate supported by PTN3365BSMP per TMDS lane?
The PTN3365BSMP supports up to 3.0 Gbit/s per TMDS lane, enabling full compliance with HDMI v1.4b and DVI v1.0 specifications for 4K × 2K resolution at 60 Hz, 3D video formats, and 36-bit deep color. This rate is confirmed in the official NXP datasheet Rev. 1.1 under "General description" and Table 10 "Differential output characteristics", where tjit(add) and skew budgets are specified at 3.0 Gbit/s operation. The PTN3365BSMP achieves this without re-timing, preserving native signal integrity.
Does PTN3365BSMP require external termination resistors on its differential inputs?
No, PTN3365BSMP does not require external termination resistors on its IN_Dx differential inputs. It integrates internal 50 Ω self-biasing termination resistors, as explicitly stated in Section 2.1 and Table 9 of the NXP datasheet. These terminations are automatically enabled when OE_N is LOW and disabled when OE_N is HIGH - eliminating BOM items and improving impedance matching consistency across all four lanes. The PTN3365BSMP datasheet confirms ZRX_DC = 40–60 Ω typical.
How does PTN3365BSMP handle Hot Plug Detect (HPD) signal translation?
The PTN3365BSMP translates HPD from 0–5 V on the sink side (HPD_SINK, pin 21) to 0–3.3 V on the source side (HPD_SOURCE, pin 5) using a non-inverting level-shifting buffer. It includes an integrated 200 kΩ pull-down resistor on HPD_SINK to guarantee a logic LOW when no display is connected - a feature documented in Section 2.3 and Table 3 of the datasheet. Critically, HPD_SOURCE follows HPD_SINK state regardless of OE_N or DDC_EN status, ensuring reliable plug/unplug detection even in standby mode. This behavior is confirmed in Table 4 "Enable/disable truth table".
Can PTN3365BSMP drive long HDMI cables, and how is signal integrity maintained?
Yes, PTN3365BSMP supports long HDMI cable runs through two key features: programmable 5-level equalization (via EQ5 pin) and active DDC rise-time acceleration. The equalizer compensates for high-frequency loss in cables up to 9 dB, while the DDC channel drives up to 1400 pF or 18 meters on the sink side - both verified in Sections 2.1, 7.3, and 7.5 of the datasheet. These capabilities allow the PTN3365BSMP to maintain HDMI DDC specification compliance and TMDS eye opening at 3.0 Gbit/s, unlike fixed-gain alternatives.
What power-saving modes does PTN3365BSMP support, and how are they controlled?
PTN3365BSMP supports two independent power-saving modes: TMDS lane disable (via OE_N pin, pin 17) and DDC channel disable (via DDC_EN pin, pin 23). When OE_N = HIGH, IN_Dx inputs go high-impedance and OUT_Dx outputs enter zero-current high-Z state, reducing supply current to ≤5 mA. When DDC_EN = LOW, SCL/SDA paths isolate, disabling DDC buffering while preserving HPD functionality. Both modes are detailed in Section 7.1 and Table 4 of the NXP datasheet, and the PTN3365BSMP maintains full HPD pass-through in all states.
PTN3365BSMP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Shifter
- Applications:
- Consumer Video
- Standards:
- -
- Control Interface:
- I2C
- Voltage - Supply:
- 3V ~ 3.6V
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-HVQFN (5x5)
PTN3365BSMP FAQ
1.How can I place an order for PTN3365BSMP through Aetrix?
Please submit a Request for Quotation (RFQ) for PTN3365BSMP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PTN3365BSMP reliable?
The price and inventory of PTN3365BSMP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PTN3365BSMP is usually 5 days.
3.What payment methods are accepted for PTN3365BSMP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PTN3365BSMP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PTN3365BSMP?
PTN3365BSMP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PTN3365BSMP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PTN3365BSMP?
For technical support, including PTN3365BSMP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PTN3365BSMP requirements.
6.How does Aetrix verify that PTN3365BSMP is sourced from the original manufacturer or authorized distributors?
All PTN3365BSMP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PTN3365BSMP meets industry standards.
7.What is the process for return or replacement of PTN3365BSMP?
All PTN3365BSMP units undergo pre-shipment inspection (PSI). If there is an issue with PTN3365BSMP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PTN3365BSMP part is unused and in its original packaging.
Return procedure for PTN3365BSMP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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